LH75411N0Q100C0 Sharp Microelectronics, LH75411N0Q100C0 Datasheet - Page 21

• Manufacturer Part Number: LH75411N0Q100C0
• Description: IC ARM7 BLUESTREAK MCU 144LQFP
• Manufacturer: Sharp Microelectronics
• Series: BlueStreak ; LH7r

Specifications of LH75411N0Q100C0

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 84MHz
• Connectivity: EBI/EMI, SPI, SSI, SSP, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, LCD, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 84 MHz
• Number Of Programmable I/os: 8
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

System-on-Chip
LH75411 Signal Descriptions
Data Sheet
PIN NO. SIGNAL NAME
10
12
13
15
16
18
19
20
21
22
23
24
25
27
28
29
30
31
32
33
35
36
37
38
39
40
43
44
45
46
47
49
50
51
52
53
55
56
57
58
60
61
72
73
1
2
4
5
6
7
9
D[15:0]
nWE
nOE
nWAIT
nBLE1
nBLE0
nCS3
nCS2
nCS1
nCS0
A[23:0]
DREQ
DACK
Input/Output Data Input/Output Signals
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
TYPE
Input
Input
Table 4. LH75411 Signal Descriptions
Static Memory Controller Write Enable
Static Memory Controller Output Enable
Static Memory Controller External Wait Control
Static Memory Controller Byte Lane Strobe
Static Memory Controller Byte Lane Strobe
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Address Signals
DMA Request
DMA Acknowledge
DMA CONTROLLER (DMAC)
MEMORY INTERFACE (MI)
Version 1.2
DESCRIPTION
LH75400/01/10/11
NOTES
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1
2
2
1
1
1
2
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