Z8F042AHJ020SG Zilog, Z8F042AHJ020SG Datasheet - Page 78

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Z8F042AHJ020SG

Manufacturer Part Number
Z8F042AHJ020SG
Description
IC ENCORE XP MCU FLASH 4K 28SSOP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F042AHJ020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
23
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4159
Z8F042AHJ020SG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F042AHJ020SG2156
Manufacturer:
ZILOG
Quantity:
121
Table 32. IRQ1 Enable High Bit Register (IRQ1ENH)
Table 33. IRQ1 Enable Low Bit Register (IRQ1ENL)
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
IRQ2 Enable High and Low Bit Registers
7
7
PA7ENH
PA7ENL
Table 31. IRQ1 Enable and Priority Encoding
PAxENH—Port A Bit[x] Interrupt Request Enable High Bit
PAxENL—Port A Bit[x] Interrupt Request Enable Low Bit
Table 34
Registers
Interrupt Request 2 register. Priority is generated by setting bits in each register.
IRQ1ENH[x]
where x indicates the register bits from 0 through 7.
6
6
PA6ENH
PA6ENL
0
0
1
1
describes the priority control for IRQ2. The IRQ2 Enable High and Low Bit
(Table 35
5
5
IRQ1ENL[x]
PA5ENH
PA5ENL
and
Table
0
1
0
1
36) form a priority encoded enabling for interrupts in the
4
4
PA4ENH
PA4ENL
Priority
Disabled
Level 1
Level 2
Level 3
FC4H
FC5H
R/W
R/W
0
0
3
3
PA3ENH
PA3ENL
Description
Disabled
Low
Nominal
High
2
2
Z8 Encore! XP
PA2ENH
PA2ENL
Product Specification
1
1
PA1ENH
PA1ENL
®
Interrupt Controller
F0822 Series
0
0
PA0ENH
PA0ENL
65

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