C8051F321R Silicon Laboratories Inc, C8051F321R Datasheet - Page 20

IC 8051 MCU 16K FLASH 28MLP

C8051F321R

Manufacturer Part Number
C8051F321R
Description
IC 8051 MCU 16K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheet

Specifications of C8051F321R

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
336-1067-2
C8051F320/1
1.1.
1.1.1. Fully 8051 Compatible
The C8051F320/1 family utilizes Silicon Labs' proprietary CIP-51 microcontroller core. The CIP-51 is fully compat-
ible with the MCS-51™ instruction set; standard 803x/805x assemblers and compilers can be used to develop soft-
ware. The CIP-51 core offers all the peripherals included with a standard 8052, including four 16-bit counter/timers,
a full-duplex UART with extended baud rate configuration, an enhanced SPI port, 2304 bytes of on-chip RAM,
128 byte Special Function Register (SFR) address space, and 25/21 I/O pins.
1.1.2. Improved Throughput
The CIP-51 employs a pipelined architecture that greatly increases its instruction throughput over the standard 8051
architecture. In a standard 8051, all instructions except for MUL and DIV take 12 or 24 system clock cycles to exe-
cute with a maximum system clock of 12-to-24 MHz. By contrast, the CIP-51 core executes 70% of its instructions in
one or two system clock cycles, with only four instructions taking more than four system clock cycles.
The CIP-51 has a total of 109 instructions. The table below shows the total number of instructions that require each
execution time.
With the CIP-51's maximum system clock at 25 MHz, it has a peak throughput of 25 MIPS. Figure 1.3 shows a com-
parison of peak throughputs for various 8-bit microcontroller cores with their maximum system clocks.
20
Number of Instructions
Clocks to Execute
CIP-51™ Microcontroller Core
Figure 1.3. Comparison of Peak MCU Execution Speeds
25
20
15
10
5
26
1
Silicon Labs
(25MHz clk)
CIP-51
50
2
(33MHz clk)
PIC17C75x
2/3
Rev. 1.1
5
Microchip
14
3
(33MHz clk)
Philips
80C51
3/4
7
4
3
(16MHz clk)
ADuC812
8051
4/5
1
5
2
8
1

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