M38869FFAHP Renesas Electronics America, M38869FFAHP Datasheet - Page 72

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M38869FFAHP

Manufacturer Part Number
M38869FFAHP
Description
IC 740 MCU FLASH 61K 80LQFP
Manufacturer
Renesas Electronics America
Series
740/38000r
Datasheet

Specifications of M38869FFAHP

Core Processor
740
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SIO, UART/USART
Peripherals
PWM, WDT
Number Of I /o
64
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M38869FFAHP
Manufacturer:
MIT
Quantity:
20 000
Part Number:
M38869FFAHP#UU
Manufacturer:
Renesas Electronics America
Quantity:
10 000
The microcomputer enters the program mode by inputting com-
mand code “40
into the internal command latch at the rising edge of the WE input.
When the address which indicates a program location and data is
input in the second cycle, the M38869FFAHP/GP internally
latches the address at the falling edge of the WE input and the
data at the rising edge of the WE input. The M38869FFAHP/GP
starts programming at the rising edge of the WE input in the sec-
ond cycle and finishes programming within 10 s as measured by
its internal timer. Programming is performed in units of bytes.
Note: A programming operation is not completed by executing the
Fig. 69 Input/output timings during programming (Verify data is output at the same timing as for read.)
Program command
Address
CE
OE
WE
Data
V
PP
program command once. Always be sure to execute a pro-
gram verify command after executing the program command.
When the failure is found in this verification, the user must re-
peatedly execute the program command until the pass. Refer
to Figure 71 for the programming flowchart.
V
V
PP
PP
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
16
H
L
” in the first cycle. The command code is latched
t
VSC
___
t
CS
t
t
WC
RRW
t
WP
t
DS
40
16
t
CH
___
t
t
DH
WPH
___
t
AS
Program
address
t
CS
___
t
t
WP
AH
t
DS
D
IN
t
CH
t
DH
Program
t
DP
The microcomputer enters the program verify mode by inputting
command code “C0
verify the programmed data after executing the program com-
mand. The command code is latched into the internal command
latch at the rising edge of the WE input. When control signals are
input in the second cycle at the timing shown in Figure 69, the
M38869FFAHP/GP outputs the programmed address’s contents to
the external. Since the address is internally latched when the pro-
gram command is executed, there is no need to input it in the
second cycle.
Program verify command
t
CS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
t
WP
t
DS
C0
16
t
CH
16
MITSUBISHI MICROCOMPUTERS
” in the first cycle. This command is used to
t
DH
t
WRR
___
Program verify
3886 Group
Verify data output
Dout
69

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