MCP6024-E/SL Microchip Technology, MCP6024-E/SL Datasheet - Page 18

• Manufacturer Part Number: MCP6024-E/SL
• Description: IC OPAMP QUAD 2.5V 10MHZ 14SOIC
• Manufacturer: Microchip Technology

Specifications of MCP6024-E/SL

• Slew Rate: 7 V/µs
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Amplifier Type: General Purpose
• Number Of Circuits: 4
• Output Type: Rail-to-Rail
• Gain Bandwidth Product: 10MHz
• Current - Input Bias: 1pA
• Voltage - Input Offset: 500µV
• Current - Supply: 1mA
• Current - Output / Channel: 30mA
• Voltage - Supply, Single/dual (±): 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Channels: 4
• Common Mode Rejection Ratio (min): 70 dB
• Input Offset Voltage: 0.25 mV
• Input Bias Current (max): 5000 pA
• Operating Supply Voltage: 3 V, 5 V
• Supply Current: 5.4 mA
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Shutdown: No
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.5 V
• Technology: CMOS
• Voltage Gain Db: 110 dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP6021/1R/2/3/4
When driving large capacitive loads with these op
amps (e.g., > 60 pF when G = +1), a small series
resistor at the output (R
feedback loop’s phase margin (stability) by making the
load resistive at higher frequencies. The bandwidth will
be generally lower than the bandwidth with no
capacitive load.
FIGURE 4-3:
Stabilizes Large Capacitive Loads.
Figure 4-4
different capacitive loads and gains. The x-axis is the
normalized load capacitance (C
circuit’s noise gain. For non-inverting gains, G
Signal Gain are equal. For inverting gains, G
1+|Signal Gain| (e.g., -1 V/V gives G
FIGURE 4-4:
for capacitive loads.
After selecting R
resulting frequency response peaking and step
response overshoot. Modify R
response is reasonable. Evaluation on the bench and
simulations with the MCP6021/1R/2/3/4 Spice macro
model are helpful.
4.4
Figure 2-35
(frequency
response) overshoot. The capacitance to ground at the
inverting input (C
input capacitance plus board parasitic capacitance. C
is in parallel with R
at high frequencies for non-inverting gains greater than
DS21685D-page 18
V
IN
1,000
100
10
Gain Peaking
10
G
gives recommended R
and
MCP602X
N
response)
≥ +1
Normalized Capacitance; C
ISO
Figure 2-36
G
G
) is the op amp’s common mode
, which causes an increase in gain
for your circuit, double-check the
100
Output Resistor R
Recommended R
ISO
gain
in
Figure
use R
L
ISO
peaking
/G
R
1,000
ISO
N
’s value until the
), where G
N
F
4-3) improves the
ISO
L
= 1 kΩ to avoid
= +2 V/V).
/G
N
(pF)
ISO
ISO
values for
and
C
L
N
V
values
10,000
OUT
N
and the
is the
(step
N
is
G
1 V/V (unity gain). C
of the feedback loop for both non-inverting and
inverting gains.
FIGURE 4-5:
with Parasitic Capacitance.
The largest value of R
used is a function of noise gain (see G
“Capacitive Loads”) and C
for various conditions. Other compensation techniques
may be used, but they tend to be more complicated to
the design.
FIGURE 4-6:
with parasitic capacitance.
4.5
The MCP6023 is a single amplifier with chip select
(CS). When CS is pulled high, the supply current drops
to 10 nA (typical) and flows through the CS pin to V
When this happens, the amplifier output is put into a
high-impedance state. By pulling CS low, the amplifier
is enabled. The CS pin has an internal 5 MΩ (typical)
pulldown resistor connected to V
the CS pin is left floating.
show the output voltage and supply current response to
a CS pulse.
1.E+05
1.E+04
1.E+03
1.E+02
100k
V
10k
100
1k
MCP6023 Chip Select (CS)
IN
1
G
C
N
C
G
> +1 V/V
G
= 20 pF
C
= 7 pF
G
G
Non-inverting Gain Circuit
Non-inverting gain circuit
also reduces the phase margin
Noise Gain; G
F
© 2009 Microchip Technology Inc.
R
in
G
Figure 1-1
G
Figure 4-5
.
R
Figure 4-6
F
SS
N
, so it will go low if
(V/V)
N
and
that should be
C
C
in Section 4.3
G
G
shows results
V
= 50 pF
= 100 pF
Figure 2-39
OUT
10
SS
.