AD8620ARZ Analog Devices Inc, AD8620ARZ Datasheet - Page 15

• Manufacturer Part Number: AD8620ARZ
• Description: IC OPAMP JFET 25MHZ DUAL 8SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD8620ARZ

• Slew Rate: 60 V/µs
• Design Resources: Using AD7328 in Appls with Single-Ended Industrial-Level Signals (CN0047)
• Amplifier Type: J-FET
• Number Of Circuits: 2
• Gain Bandwidth Product: 25MHz
• Current - Input Bias: 3pA
• Voltage - Input Offset: 85µV
• Current - Supply: 3mA
• Current - Output / Channel: 45mA
• Voltage - Supply, Single/dual (±): ±5 V ~ 13 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Op Amp Type: Precision
• No. Of Amplifiers: 2
• Bandwidth: 25MHz
• Supply Voltage Range: ± 5V To ± 13V
• Amplifier Case Style: SOIC
• No. Of Pins: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• -3db Bandwidth: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Slew Rate (Unity Gain Inverting vs. Noninverting)
Amplifiers generally have a faster slew rate in an inverting unity
gain configuration due to the absence of the differential input
capacitance. Figure 49 through Figure 52 show the performance
of the AD8610/AD8620 configured in a unity gain of –1 compared
to the OPA627. The AD8610/AD8620 slew rate is more symme-
trical, and both the positive and negative transitions are much
cleaner than in the OPA627.
Figure 49. +Slew Rate of AD8610/AD8620 in Unity Gain of –1
Figure 50. +Slew Rate of OPA627 in Unity Gain of –1
TIME (400ns/DIV)
TIME (400ns/DIV)
SR = 54V/µs
SR = 42.1V/µs
V
R
G = –1
V
R
G = –1
S
L
S
L
= ±13V
= 2kΩ
= ±13V
= 2kΩ
Rev. F | Page 15 of 24
The AD8610/AD8620 have a very fast slew rate of 60 V/μs even
when configured in a noninverting gain of +1. This is the toughest
condition to impose on any amplifier because the input common-
mode capacitance of the amplifier generally makes its SR appear
worse. The slew rate of an amplifier varies according to the voltage
difference between its two inputs. To observe the maximum SR,
a voltage difference of about 2 V between the inputs must be
ensured. This is required for virtually any JFET op amp so that
one side of the op amp input circuit is completely off, thus maxi-
mizing the current available to charge and discharge the internal
compensation capacitance. Lower differential drive voltages
produce lower slew rate readings. A JFET input op amp with a
slew rate of 60 V/μs at unity gain with V
20 V/μs if it is operated at a gain of +100 with V
Figure 51. –Slew Rate of AD8610/AD8620 in Unity Gain of –1
Figure 52. –Slew Rate of OPA627 in Unity Gain of –1
TIME (400ns/DIV)
TIME (400ns/DIV)
SR = 56V/µs
SR = 54V/µs
AD8610/AD8620
IN
= 10 V may slew at
V
R
G = –1
V
R
G = –1
S
L
S
L
IN
= 2kΩ
= ±13V
= ±13V
= 2kΩ
= 100 mV.