AD8620ARZ Analog Devices Inc, AD8620ARZ Datasheet - Page 19

• Manufacturer Part Number: AD8620ARZ
• Description: IC OPAMP JFET 25MHZ DUAL 8SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD8620ARZ

• Slew Rate: 60 V/µs
• Design Resources: Using AD7328 in Appls with Single-Ended Industrial-Level Signals (CN0047)
• Amplifier Type: J-FET
• Number Of Circuits: 2
• Gain Bandwidth Product: 25MHz
• Current - Input Bias: 3pA
• Voltage - Input Offset: 85µV
• Current - Supply: 3mA
• Current - Output / Channel: 45mA
• Voltage - Supply, Single/dual (±): ±5 V ~ 13 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Op Amp Type: Precision
• No. Of Amplifiers: 2
• Bandwidth: 25MHz
• Supply Voltage Range: ± 5V To ± 13V
• Amplifier Case Style: SOIC
• No. Of Pins: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• -3db Bandwidth: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Input Offset Voltage Adjustment
Offset of AD8610 is very small and normally does not require
additional offset adjustment. However, the offset adjust pins can
be used as shown in Figure 66 to further reduce the dc offset. By
using resistors in the range of 50 kΩ, offset trim range is ±3.3 mV.
Programmable Gain Amplifier (PGA)
The combination of low noise, low input bias current, low input
offset voltage, and low temperature drift make the AD8610/
AD8620 a perfect solution for programmable gain amplifiers.
PGAs are often used immediately after sensors to increase the
dynamic range of the measurement circuit. Historically, the large
on resistance of switches (combined with the large I
of amplifiers) created a large dc offset in PGAs. Recent and
improved monolithic switches and amplifiers completely remove
these problems. A PGA discrete circuit is shown in Figure 67.
In Figure 67, when the 10 pA bias current of the AD8610 is
dropped across the (<5 Ω) R
negligible offset error.
When high precision resistors are used, as in the circuit of
Figure 67, the error introduced by the PGA is within the
½ LSB requirement for a 16-bit system.
Figure 66. Offset Voltage Nulling Circuit
2
3
V–
AD8610
4
V+
7
5
ON
R1
of the switch, it results in a
1
6
V
OUT
B
currents
Rev. F | Page 19 of 24
1. Room temperature error calculation due to R
2. Full temperature error calculation due to R
3. The temperature coefficient of switch and AD8610/AD8620
combined is essentially the same as the T
AD8610/AD8620.
ΔV
Total Offset = AD8610 (Offset) + ΔV
Total Offset = AD8610 (Offset_Trimmed) + ΔV
Total Offset = 5 μV + 10 pV ≈ 5 μV
ΔV
ΔV
ΔV
250 pA × 15 Ω = 3.75 nV
ΔV
OS
OS
OS
OS
A
A
/ΔT(total) = ΔV
/ΔT(total) = 0.5 μV/°C + 0.06 nV/°C ≈ 0.5 μV/°C
0
(@ 85°C) = I
1
= I
OS
/ΔT(I
74HC139
B
A
B
G
× R
V
Y
Y
Y
Y
IN
0
1
2
3
ON
B
5pF
16
× R
Figure 67. High Precision PGA
1
9
8
100Ω
= 2 pA × 5 Ω = 10 pV
B
12
ON
+5V
(@ 85°C) × R
V
IN1
IN2
IN3
IN4
)
L
OS
3
2
V
4
–5V
ADG452
SS
/ΔT(AD8610/AD8620) +
AD8610
–5V
+5V
+5V
V
7
4
DD
13
GND
5
1
5
S1
D1
S2
D2
S3
D3
S4
D4
ON
AD8610/AD8620
3
2
14
15
11
10
6
7
6
(@ 85°C) =
OS
C
10kΩ
1kΩ
10kΩ
100Ω
V
1kΩ
11Ω
ON
OS
ON
and I
of the
G = +1
G = +10
G = +100
G = +1000
V
and I
OUT
OS
B
B