AD8620ARZ Analog Devices Inc, AD8620ARZ Datasheet - Page 16

IC OPAMP JFET 25MHZ DUAL 8SOIC

AD8620ARZ

Manufacturer Part Number
AD8620ARZ
Description
IC OPAMP JFET 25MHZ DUAL 8SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8620ARZ

Slew Rate
60 V/µs
Design Resources
Using AD7328 in Appls with Single-Ended Industrial-Level Signals (CN0047)
Amplifier Type
J-FET
Number Of Circuits
2
Gain Bandwidth Product
25MHz
Current - Input Bias
3pA
Voltage - Input Offset
85µV
Current - Supply
3mA
Current - Output / Channel
45mA
Voltage - Supply, Single/dual (±)
±5 V ~ 13 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Op Amp Type
Precision
No. Of Amplifiers
2
Bandwidth
25MHz
Supply Voltage Range
± 5V To ± 13V
Amplifier Case Style
SOIC
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
-3db Bandwidth
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD8610/AD8620
The slew rate of the AD8610/AD8620 is double that of the
OPA627 when configured in a unity gain of +1 (see Figure 53
and Figure 54).
The slew rate of an amplifier determines the maximum frequency
at which it can respond to a large signal input. This frequency
(known as full power bandwidth or FPBW) can be calculated
for a given distortion (for example, 1%) from the equation
FPBW
Figure 53. +Slew Rate of AD8610/AD8620 in Unity Gain of +1
0V
0V
Figure 54. +Slew Rate of OPA627 in Unity Gain of +1
CH
CH
=
1
2
(
2
= 20.8V p-p
= 19.4V p-p
π
×
SR
V
Figure 55. AD8610 FPBW
PEAK
)
TIME (400ns/DIV)
TIME (400ns/DIV)
TIME (400ns/DIV)
SR = 85V/µs
SR = 23V/µs
V
R
G = +1
V
R
G = +1
S
S
L
L
= 2kΩ
= ±13V
= 2kΩ
= ±13V
Rev. F | Page 16 of 24
Input Overvoltage Protection
When the input of an amplifier is driven below V
by more than one V
through the negative supply (V–) or the positive supply (V+),
respectively, to the input pins and can destroy the device. If the
input source can deliver larger currents than the maximum
forward current of the diode (>5 mA), a series resistor can be
added to protect the inputs. With its very low input bias and
offset current, a large series resistor can be placed in front of the
AD8610/AD8620 inputs to limit current to below damaging
levels. Series resistance of 10 kΩ generates less than 25 μV of offset.
This 10 kΩ allows input voltages more than 5 V beyond either
power supply. Thermal noise generated by the resistor adds
7.5 nV/√Hz to the noise of the AD8610/AD8620. For the AD8610/
AD8620, differential voltages equal to the supply voltage do not
cause any problems (see Figure 55). In this context, note that the
high breakdown voltage of the input FETs eliminates the need to
include clamp diodes between the inputs of the amplifier, a practice
that is mandatory on many precision op amps. Unfortunately,
clamp diodes greatly interfere with many application circuits,
such as precision rectifiers and comparators. The AD8610/
AD8620 are free from these limitations.
No Phase Reversal
Many amplifiers misbehave when one or both of the inputs are
forced beyond the input common-mode voltage range. Phase
reversal is typified by the transfer function of the amplifier,
effectively reversing its transfer polarity. In some cases, this can
cause lockup and even equipment damage in servo systems and
can cause permanent damage or no recoverable parameter shifts
to the amplifier itself. Many amplifiers feature compensation
circuitry to combat these effects, but some are only effective for
the inverting input. The AD8610/AD8620 are designed to prevent
phase reversal when one or both inputs are forced beyond their
input common-mode voltage range.
14V
Figure 56. Unity Gain Follower
BE
Figure 57. No Phase Reversal
V1
0
, large currents flow from the substrate
TIME (400µs/DIV)
3
2
+13V
–13V
7
4
AD8610
6
V
IN
EE
or above V
V
OUT
CC

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