LM8261M5/NOPB National Semiconductor, LM8261M5/NOPB Datasheet - Page 14

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LM8261M5/NOPB

Manufacturer Part Number
LM8261M5/NOPB
Description
IC OP AMP HI OUT R-R SOT23-5
Manufacturer
National Semiconductor
Datasheet

Specifications of LM8261M5/NOPB

Amplifier Type
General Purpose
Number Of Circuits
1
Output Type
Rail-to-Rail
Slew Rate
15 V/µs
Gain Bandwidth Product
24MHz
Current - Input Bias
1.05µA
Voltage - Input Offset
700µV
Current - Supply
1.3mA
Current - Output / Channel
100mA
Voltage - Supply, Single/dual (±)
2.5 V ~ 30 V, ±1.25 V ~ 15 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SOT-23-5, SC-74A, SOT-25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Other names
LM8261M5
LM8261M5TR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM8261M5/NOPB
Manufacturer:
NS/国半
Quantity:
20 000
www.national.com
Application Hints
BLOCK DIAGRAM AND OPERATIONAL DESCRIPTION
As can be seen from the simplified schematic in
input stage consists of two distinct differential pairs (Q1-Q2
and Q3-Q4) in order to accommodate the full Rail-to-Rail input
common mode voltage range. The voltage drop across R5,
R6, R7, and R8 is kept to less than 200mV in order to allow
the input to exceed the supply rails. Q13 acts as a switch to
steer current away from Q3-Q4 and into Q1-Q2, as the input
increases beyond 1.4V of V
from the bottom stage differential pair to the top one and
causes a subsequent increase in the supply current.
In transitioning from one stage to another, certain input stage
parameters (V
which differential pair is "on" at the time. Input Bias current,
I
transition region. In addition, parameters such as PSRR and
CMRR which involve the input offset voltage will also be ef-
fected by changes in V
region.
The input stage is protected with the combination of R9-R10
and D1, D2, D3, and D4 against differential input over-volt-
B
, will change in value and polarity as the input crosses the
A) Input Stage
OS
, I
b
, I
OS
CM
, e
across the differential pair transition
n
+
, and i
. This in turn shifts the signal path
n
) are determined based on
FIGURE 1. Simplified Schematic Diagram
Figure
1, the
14
ages. This fault condition could otherwise harm the differential
pairs or cause offset voltage shift in case of prolonged over
voltage. As shown in
imately ±1.4V at 25°C, the diodes turn on and current flow is
limited by the internal series resistors (R9 and R10). The Ab-
solute Maximum Rating of ±10V differential on V
to be observed. With temperature variation, the point were the
diodes turn on will change at the rate of 5mV/°C.
Figure
2, if this voltage reaches approx-
IN
still needs
10108467

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