LMV842QMA/NOPB National Semiconductor, LMV842QMA/NOPB Datasheet - Page 13

• Manufacturer Part Number: LMV842QMA/NOPB
• Description: IC AMP R-R I/O LV LP DUAL 8SOIC
• Manufacturer: National Semiconductor

Specifications of LMV842QMA/NOPB

• Amplifier Type: General Purpose
• Number Of Circuits: 2
• Output Type: Rail-to-Rail
• Slew Rate: 2.5 V/µs
• Gain Bandwidth Product: 4.5MHz
• Current - Input Bias: 0.3pA
• Voltage - Input Offset: 50µV
• Current - Supply: 1.03mA
• Current - Output / Channel: 37mA
• Voltage - Supply, Single/dual (±): 2.7 V ~ 12 V, ±1.35 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Number Of Channels: 2
• Voltage Gain Db: 133 dB
• Common Mode Rejection Ratio (min): 81 dB
• Input Offset Voltage: 0.5 mV at 5 V
• Operating Supply Voltage: 3 V, 5 V, 9 V
• Supply Current: 3 mA at 5 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Details
• Other names: LMV842QMA

Application Information
INTRODUCTION
The LMV841/LMV842/LMV844 are operational amplifiers
with near-precision specifications: low noise, low temperature
drift, low offset, and rail-to-rail input and output. Possible ap-
plication areas include instrumentation, medical, test equip-
ment, audio, and automotive applications.
Its low supply current of 1mA per amplifier, temperature range
of −40°C to 125°C, 12V supply with CMOS input, and the
small SC70 package for the LMV841 make the LMV841/
LMV842/LMV844 a unique op amp family and a perfect
choice for portable electronics.
INPUT PROTECTION
The LMV841/LMV842/LMV844 have a set of anti-parallel
diodes D
1. These diodes are present to protect the input stage of the
amplifier. At the same time, they limit the amount of differential
input voltage that is allowed on the input pins.
A differential signal larger than one diode voltage drop can
damage the diodes. The differential signal between the inputs
needs to be limited to ±300mV or the input current needs to
be limited to ±10mA.
Note that when the op amp is slewing, a differential input volt-
age exists that forward biases the protection diodes. This may
result in current being drawn from the signal source. While
this current is already limited by the internal resistors R
R
back path, or a 500Ω resistor can be placed in series with the
input signal for further limitation.
INPUT STAGE
The input stage of this amplifier consists of both a PMOS and
an NMOS input pair to achieve a rail-to-rail input range. For
input voltages close to the negative rail, only the PMOS pair
is active. Close to the positive rail, only the NMOS pair is ac-
tive. In a transition region that extends from approximately 2V
below V
gradually takes over from the other. In this transition region,
the input-referred offset voltage changes from the offset volt-
age associated with the PMOS pair to that of the NMOS pair.
The input pairs are trimmed independently to guarantee an
input offset voltage of less then 0.5 mV at room temperature
over the complete rail-to-rail input range. This also signifi-
cantly improves the CMRR of the amplifier in the transition
2
FIGURE 1. Protection Diodes between the Input Pins
(both 130Ω), a resistor of 1kΩ can be placed in the feed-
+
1
to 1V below V
and D
2
between the input pins, as shown in
+
, both pairs are active, and one pair
20168351
Figure
1
and
13
region. Note that the CMRR and PSRR limits in the tables are
large-signal numbers that express the maximum variation of
the amplifier's input offset over the full common-mode voltage
and supply voltage range, respectively. When the amplifier's
common-mode input voltage is within the transition region,
the small signal CMRR and PSRR may be slightly lower than
the large signal limits.
CAPACITIVE LOAD
The LMV841/LMV842/LMV844 can be connected as non-in-
verting unity gain amplifiers. This configuration is the most
sensitive to capacitive loading. The combination of a capaci-
tive load placed on the output of an amplifier along with the
amplifier’s output impedance creates a phase lag, which re-
duces the phase margin of the amplifier. If the phase margin
is significantly reduced, the response will be under-damped
which causes peaking in the transfer and, when there is too
much peaking, the op amp might start oscillating.
The LMV841/LMV842/LMV844 can directly drive capacitive
loads up to 100pF without any stability issues. In order to drive
heavier capacitive loads, an isolation resistor, R
used, as shown in
the capacitive load is isolated from the amplifier’s output, and
hence, the pole caused by C
loop. The larger the value of R
voltage will be. If values of R
feedback loop will be stable, independent of the value of C
However, larger values of R
and reduced output current drive.
DECOUPLING AND LAYOUT
For decoupling the supply lines it is suggested that 10nF ca-
pacitors be placed as close as possible to the op amp.
For single supply, place a capacitor between V
dual supplies, place one capacitor between V
ground, and the second capacitor between ground and V
OP AMP CIRCUIT NOISE
The LMV841/LMV842/LMV844 have good noise specifica-
tions, and will frequently be used in low-noise applications.
Therefore it is important to determine the noise of the total
circuit. Besides the input referred noise of the op amp, the
feedback resistors may have an important contribution to the
total noise.
For applications with a voltage input configuration it is, in gen-
eral, beneficial to keep the resistor values low. In these con-
figurations high resistor values mean high noise levels.
However, using low resistor values will increase the power
consumption of the application. This is not always acceptable
for portable applications, so there is a trade-off between noise
level and power consumption.
Besides the noise contribution of the signal source, three
types of noise need to be taken into account for calculating
the noise performance of an op amp circuit:
FIGURE 2. Isolating Capacitive Load
Figure
2. By using this isolation resistor,
ISO
L
ISO
result in reduced output swing
ISO
is no longer in the feedback
, the more stable the output
are sufficiently large, the
20168350
+
and the board
ISO
+
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and V
, should be
−
. For
−
.
L
.