IC OP AMP PREC RR I/O SGL 8-SOIC

LMP7701MA/NOPB

Manufacturer Part NumberLMP7701MA/NOPB
DescriptionIC OP AMP PREC RR I/O SGL 8-SOIC
ManufacturerNational Semiconductor
SeriesLMP®
LMP7701MA/NOPB datasheet
 


Specifications of LMP7701MA/NOPB

Amplifier TypeGeneral PurposeNumber Of Circuits1
Output TypeRail-to-RailSlew Rate1.1 V/µs
Gain Bandwidth Product2.5MHzCurrent - Input Bias0.2pA
Voltage - Input Offset37µVCurrent - Supply790µA
Current - Output / Channel86mAVoltage - Supply, Single/dual (±)2.7 V ~ 12 V, ±1.35 V ~ 6 V
Operating Temperature-40°C ~ 125°CMounting TypeSurface Mount
Package / Case8-SOIC (3.9mm Width)Lead Free Status / RoHS StatusLead free / RoHS Compliant
-3db Bandwidth-Other namesLMP7701MA
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This equation is rearranged to find the location of the two
poles:
As shown in Equation 1, as values of R
the magnitude of the poles is reduced, which in turn decreas-
es the bandwidth of the amplifier. Whenever possible, it is
best to choose smaller feedback resistors. Figure 3 shows the
effect of the feedback resistor on the bandwidth of the
LMP7701/LMP7702/LMP7704.
FIGURE 3. Closed Loop Gain vs. Frequency
Equation 1 has two poles. In most cases, it is the presence of
pairs of poles that causes gain peaking. In order to eliminate
this effect, the poles should be placed in Butterworth position,
since poles in Butterworth position do not cause gain peaking.
To achieve a Butterworth pair, the quantity under the square
root in Equation 1 should be set to equal −1. Using this fact
and the relation between R
and R
, R
1
2
value for R
can be found. This is shown in Equation 2. If R
1
is chosen to be larger than this optimum value, gain peaking
will occur.
In Figure 2, C
is added to compensate for input capacitance
F
and to increase stability. Additionally, C
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nates the gain peaking that can be caused by having a larger
feedback resistor. Figure 4 shows how C
ing.
(1)
and R
are increased,
1
2
FIGURE 4. Closed Loop Gain vs. Frequency with
DIODES BETWEEN THE INPUTS
The LMP7701/LMP7702/LMP7704 have a set of anti-parallel
diodes between the input pins, as shown in Figure 5. These
diodes are present to protect the input stage of the amplifier.
At the same time, they limit the amount of differential input
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voltage that is allowed on the input pins. A differential signal
larger than one diode voltage drop might damage the diodes.
The differential signal between the inputs needs to be limited
to ±300 mV or the input current needs to be limited to ±10 mA.
= −A
R
, the optimum
2
V
1
1
(2)
reduces or elimi-
F
16
reduces gain peak-
F
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Compensation
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FIGURE 5. Input of LMP7701