AD8132AR Analog Devices Inc, AD8132AR Datasheet - Page 25

IC AMP DIFF LDIST LP 70MA 8SOIC

AD8132AR

Manufacturer Part Number
AD8132AR
Description
IC AMP DIFF LDIST LP 70MA 8SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8132AR

Slew Rate
1200 V/µs
Mounting Type
Surface Mount
Rohs Status
RoHS non-compliant
Amplifier Type
Differential
Number Of Circuits
1
Output Type
Differential
-3db Bandwidth
360MHz
Current - Input Bias
3µA
Voltage - Input Offset
1000µV
Current - Supply
12mA
Current - Output / Channel
70mA
Voltage - Supply, Single/dual (±)
2.7 V ~ 11 V, ±1.35 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (3.9mm Width)
No. Of Amplifiers
1
Bandwidth
350MHz
Amplifier Case Style
SOIC
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Peak Reflow Compatible (260 C)
No
Rohs Compliant
No
Gain Bandwidth Product
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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LAYOUT, GROUNDING, AND BYPASSING
As a high speed part, the AD8132 is sensitive to the printed
circuit board (PCB) environment in which it operates. Realizing
its superior specifications requires attention to various details of
good high speed PCB design.
The first requirement is a good solid ground plane that covers as
much of the board area around the AD8132 as possible. The only
exception to this is that the two input pins (Pin 1 and Pin 8) are
kept a few millimeters from the ground plane and that ground
be removed from inner layers and the opposite side of the board
under the input pins. This minimizes the stray capacitance on
these nodes and helps preserve the gain flatness vs. the frequency.
Bypass the power supply pins as close as possible to the device
to the nearby ground plane and use good high frequency ceramic
chip capacitors. Do this bypassing with a capacitance value
of 0.01 μF to 0.1 μF for each supply. Farther away, provide low
frequency bypassing with 10 μF tantalum capacitors from each
supply to ground.
Keep the signal routing short and direct to avoid parasitic effects.
Wherever there are complementary signals, a symmetrical
layout with matched lengths must be provided to the extent
possible to maximize the balance performance. When running
differential signals over a long distance, place the traces on
the PCB close together or twist together any differential wiring
to minimize the area of the loop that is formed. This reduces
the radiated energy and makes the circuit less susceptible to
interference.
Rev. I | Page 25 of 32
CIRCUITS
Figure 70. G = +2 Circuit with β1 = 0, Without Resistors
Figure 67. Typical Four-Resistor Feedback Circuit
Figure 68. Typical Circuit with β1 = 0
Figure 69. Typical Circuit with β2 = 1
Figure 71. Typical Circuit with β2 = 0
V
V
V
IN
IN
IN
R
R
R
R
G1
G1
G2
G2
R
G1
R
R
R
R
+
+
+
+
F1
F2
F2
F1
R
+
F1
AD8132

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