AD8132AR Analog Devices Inc, AD8132AR Datasheet - Page 26

• Manufacturer Part Number: AD8132AR
• Description: IC AMP DIFF LDIST LP 70MA 8SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD8132AR

• Slew Rate: 1200 V/µs
• Mounting Type: Surface Mount
• Rohs Status: RoHS non-compliant
• Amplifier Type: Differential
• Number Of Circuits: 1
• Output Type: Differential
• -3db Bandwidth: 360MHz
• Current - Input Bias: 3µA
• Voltage - Input Offset: 1000µV
• Current - Supply: 12mA
• Current - Output / Channel: 70mA
• Voltage - Supply, Single/dual (±): 2.7 V ~ 11 V, ±1.35 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (3.9mm Width)
• No. Of Amplifiers: 1
• Bandwidth: 350MHz
• Amplifier Case Style: SOIC
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Peak Reflow Compatible (260 C): No
• Rohs Compliant: No
• Gain Bandwidth Product: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD8132
APPLICATIONS INFORMATION
ANALOG-TO-DIGITAL DRIVER
Many of the newer high speed ADCs are single supply and have
differential inputs. Thus, the driver for these devices is able to
convert from a single-ended signal to a differential signal and
provide output common-mode level shifting in addition to
having low distortion and noise. The AD8132 conveniently
performs these functions when driving the AD9203, a 10-bit,
40 MSPS ADC.
In Figure 73, a 1 V p-p signal drives the input of an AD8132
configured for unity gain. Both the AD8132 and the AD9203 are
powered from a single 3 V supply. A voltage divider biases V
at midsupply and in turn drives V
voltage. This is within the common-mode range of the AD9203.
Between the ADC and the driver is a 1-pole, differential filter that
helps to filter some of the noise and assists the switched-capacitor
inputs of the ADC. Each of the ADC inputs is driven by a 0.5 V p-p
signal that ranges from 1.25 V dc to 1.75 V dc. Figure 72 is an
FFT plot of the performance of the circuit when running at a
clock rate of 40 MSPS and an input frequency of 2.5 MHz.
1V p-p
49.9Ω
24.9Ω
348Ω
348Ω
10kΩ
10kΩ
OUT, cm
3V
to half of the supply
0.1µF
Figure 73. AD8132 Driving AD9203, a 10-Bit, 40 MSPS ADC
348Ω
348Ω
8
2
1
AD8132
3V
3
6
5
4
0.1µF
OCM
Rev. I | Page 26 of 32
60.4Ω
60.4Ω
+
10µF
20pF
20pF
BALANCED CABLE DRIVER
When driving a twisted pair cable, it is desirable to drive only
a pure differential signal onto the line. If the signal is purely
differential (that is, fully balanced), and the transmission line is
twisted and balanced, there is minimum radiation of any signal.
The complementary electrical fields are confined mostly to
the space between the two twisted conductors and does not
significantly radiate out from the cable. The current in the cable
creates magnetic fields that radiate to some degree. However, the
amount of radiation is mitigated by the twists, because for
each twist, the two adjacent twists have an opposite polarity
magnetic field. If the twist pitch is tight enough, these small
magnetic field loops contain most of the magnetic flux, and
the magnetic farfield strength is negligible.
–100
–110
–120
–10
–20
–30
–40
–50
–60
–70
–80
–90
0.1µF
10
AINN
AINP
25
0
26
0
Figure 72. FTT Response for AD8132 Driving AD9203
FUND
AVDD
2.5
AVSS
28
27
AD9203
3V
2ND
5.0
DRVDD
DRVSS
INPUT FREQUENCY (MHz)
2
1
7.5
3RD
10.0
0.1µF
4TH
5TH
12.5
DIGITAL
OUTPUTS
15.0
6TH
f
f
S
IN
= 40MHz
= 2.5MHz
17.5
9TH
7TH
8TH
20.0