LTC1326CMS8-2.5 Linear Technology, LTC1326CMS8-2.5 Datasheet - Page 9

IC PREC TRPL SUPPLY MONITR 8MSOP

LTC1326CMS8-2.5

Manufacturer Part Number
LTC1326CMS8-2.5
Description
IC PREC TRPL SUPPLY MONITR 8MSOP
Manufacturer
Linear Technology
Type
Multi-Voltage Supervisorr
Datasheet

Specifications of LTC1326CMS8-2.5

Number Of Voltages Monitored
3
Output
Open Drain or Open Collector
Reset
Active High/Active Low
Reset Timeout
140 ms Minimum
Voltage - Threshold
2.363V, 3.118V, Adj
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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APPLICATIO S I FOR ATIO
During a supply induced reset condition, the ability of the
PBR pin to force a soft reset condition on the SRST pin
is disabled. In other words SRST will remain high. If the
PBR pin is held low, both during and after a supply
induced reset (low RST), the RST pin will remain low until
200ms after the PBR goes high.
Power Detect/Gate Drive
The LTC1326/LTC1326-2.5 for the most part are powered
internally from the V
drive of the output FET on the RST pin. On the input to this
FET is power detection circuitry used to detect and drive
the gate from either the 3.3V input pin (V
input pin (V
(V
from the pin with the highest potential. This ensures the
part pulls the RST pin low as soon as either input pin is
≥ 1V.
Dual and Single Supply Monitor Operation
The V
disabled by the following override techniques which allow
the LTC1326 or LTC1326-2.5 to be used as a dual or single
supply monitor.
LTC1326 Override Functions
The V
This is an obvious solution since the trip points for V
and V
The V
to the voltage on V
less than 4.15V. In this manner, the part will behave as a
3.3V monitor and the V
The V
is equal to the voltage on V
are greater than approximately 4.15V. In this manner, the
LTC1326 can function as a 5V monitor with the 3.3V
monitor disabled.
When monitoring either 3.3V or 5V with V
V
CC5
CC25
(see Figure 1), the LTC1326 determines which is the
CCA
CC5
CC5
CC5
CC3
) on the LTC1326-2.5. The gate drive is derived
will always be greater than the trip point for V
pin, if unused, can be tied to either V
trip point is reenabled when the voltage on V
input trip point is disabled if its voltage is equal
, V
CC5
CC5
) on the LTC1326 or the 2.5V input pin
and V
CC3
U
CC3
±25mV and the voltage on V
CCA
CC5
pin. The exception is at the gate
U
CC3
reset will be disabled.
inputs may be individually
±25mV and the two inputs
W
CC3
CC3
CC3
strapped to
) or the 5V
U
or V
CC5
CC5
CCA
CC5
CC3
is
.
.
appropriate range. The LTC1326 handles this situation as
shown in Figure 2. Above 1V and below V
low. From V
assumes 3.3V supply monitoring and RST is deasserted.
Above approximately 4.15V, the LTC1326 operates as a 5V
monitor. In most systems, the 5V supply will pass through
the 3.1V to 4.15V region in <200ms during power-up, and
the RST output will behave as desired. Table 1 summarizes
the state of RST and RST at various operating voltages
with V
Table 1. Override Truth Table (V
INPUTS (V
0V ≤ V
1V ≤ V
V
4.15V ≤ V
V
RT3
RT5
ADJUSTABLE
≤ V
≤ V
SUPPLY
CC
CC
CC3
CC
CC
≤ 1V
≤ V
CC
CC3
≤ 4.15V
≤ V
RT3
= V
Figure 2. RST Voltage vs Supply Voltage
= V
RT5
RT3
R1
5
4
2
1
0
CC5
CC5
3
0
3.3V OR
V
4.7k PULL-UP FROM RST TO V
= V
LTC1326/LTC1326-2.5
.
CC3
to approximately 4.15V, the LTC1326
5V
R2
CC
= V
)
1
CC5
SUPPLY VOLTAGE (V)
1
2
3
4
= V
Figure 1
CCA
V
V
V
GND
2
CC3
CC5
CCA
CC3
LTC1326
= 0V TO 5V
= V
SRST
3
PBR
RST
RST
CC5
RST
0
1
0
1
CC3
)
8
7
6
5
4
1326/2.5 F02
RT3
4.7k
SYSTEM RESET
, RST is held
5
RST
1
0
1
0
1326/2.5 F01
132625fc
9

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