CAT1021LI-45-G ON Semiconductor, CAT1021LI-45-G Datasheet - Page 5

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CAT1021LI-45-G

Manufacturer Part Number
CAT1021LI-45-G
Description
IC SUPERVISR CPU 2K EEPROM 8PDIP
Manufacturer
ON Semiconductor
Type
Simple Reset/Power-On Resetr
Datasheet

Specifications of CAT1021LI-45-G

Number Of Voltages Monitored
1
Output
Open Drain or Open Collector
Reset
Active High/Active Low
Reset Timeout
130 ms Minimum
Voltage - Threshold
4.5V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Monitored Voltage
3 V, 3.3 V, 5 V
Undervoltage Threshold
4.5 V to 4.75 V
Manual Reset
Resettable
Watchdog
Watchdog
Power-up Reset Delay (typ)
200 ms
Supply Voltage (max)
5 V
Supply Voltage (min)
2 V
Supply Current (typ)
3000 uA
Maximum Power Dissipation
1000 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CAT1021LI-45-G
Manufacturer:
ON Semiconductor
Quantity:
50
CAPACITANCE
T
AC CHARACTERISTICS
V
Memory Read & Write Cycle
Notes:
(1) This parameter is characterized initially and after a design or process change that affects the parameter. Not 100% tested.
(2) Test Conditions according to “AC Test Conditions” table.
(3) The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
A
CC
Symbol
Symbol
C
t
t
t
t
t
= 25ºC, f = 1.0 MHz, V
HD; STA
HD; DAT
SU; DAT
SU; STO
t
write cycle, the bus interface circuits are disabled, SDA is allowed to remain high and the device does not respond to its slave address.
C
SU; STA
t
t
BUF
= 2.7 V to 5.5 V and over the recommended temperature conditions, unless otherwise specified.
t
f
t
WC
OUT
t
HIGH
LOW
t
t
t
SCL
R
F
IN
SP
AA
DH
(1)
(1)
(1)
(3)
(1)
(1)
Test
Output Capacitance
Input Capacitance
Parameter
Clock Frequency
Input Filter Spike Suppression (SDA, SCL)
Clock Low Period
Clock High Period
SDA and SCL Rise Time
SDA and SCL Fall Time
Start Condition Hold Time
Start Condition Setup Time (for a Repeated Start)
Data Input Hold Time
Data Input Setup Time
Stop Condition Setup Time
SCL Low to Data Out Valid
Data Out Hold Time
Time the Bus must be Free Before a New Transmission Can Start
Write Cycle Time (Byte or Page)
CC
= 5 V
(2)
5
Test Conditions
V
V
OUT
IN
CAT1021, CAT1022, CAT1023
= 0 V
= 0 V
Min
100
1.3
0.6
0.6
0.6
0.6
1.3
50
0
Max
Max
400
900
100
300
300
8
6
5
Doc. No. MD-3009 Rev. P
Units
Units
kHz
ms
pF
pF
µs
µs
µs
µs
ns
ns
ns
ns
ns
µs
ns
ns
µs

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