CAT1640LI-25-G ON Semiconductor, CAT1640LI-25-G Datasheet - Page 10

• Manufacturer Part Number: CAT1640LI-25-G
• Description: IC SUPERVSR CPU 64K EEPROM 8PDIP
• Manufacturer: ON Semiconductor
• Type: Simple Reset/Power-On Resetr

Specifications of CAT1640LI-25-G

• Number Of Voltages Monitored: 1
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: 130 ms Minimum
• Voltage - Threshold: 2.55V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Monitored Voltage: 3 V, 3.3 V, 5 V
• Output Type: Active Low, Open Drain
• Manual Reset: Resettable
• Watchdog: No Watchdog
• Battery Backup Switching: No Backup
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• Supply Current (typ): 3000 uA
• Maximum Power Dissipation: 1000 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: No
• Undervoltage Threshold: 2.55 V
• Overvoltage Threshold: 2.7 V
• Power-up Reset Delay (typ): 270 ms
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

BUS ACTIVITY:
Page Write
The CAT1640/41 writes up to 64 bytes of data in a single
write cycle, using the Page Write operation. The page
write operation is initiated in the same manner as the byte
write operation, however instead of terminating after the
initial byte is transmitted, the Master is allowed to send up
to
transmitted, the CAT1640/41 will respond with an
acknowledge and internally increment the lower order
address bits by one. The high order bits remain
unchanged.
Figure 8. Byte Write Timing
*=Don’t Care Bit
Figure 9. Page Write Timing
*=Don’t Care Bit
CAT1640, CAT1641
Doc. No. MD-3012, Rev. D
SDA LINE
MASTER
additional 63 bytes. After each byte has been
BUS ACTIVITY:
S
R
S
T
A
T
SDA LINE
MASTER
ADDRESS
SLAVE
S
S
A
R
T
T
A
C
K
***
ADDRESS
SLAVE
A 15 –A 8
BYTE ADDRESS
C
A
K
A
C
K
* **
A 15 –A 8
A 7 –A 0
BYTE ADDRESS
10
If the Master transmits more than 64 bytes before sending
the STOP condition, the address counter ‘wraps around,’
and previously transmitted data will be overwritten.
When all 64 bytes are received, and the STOP condition
has been sent by the Master, the internal programming
cycle begins. At this point, all received data is written to
the CAT1640/41 in a single write cycle.
A
C
K
A
C
K
A 7 –A 0
DATA
A
C
K
C
A
K
DATA n
DATA
Characteristics subject to change without notice.
A
C
K
C
A
K
© 2009 SCILLC. All rights reserved.
P
O
S
T
P
A
C
K
DATA n+63
A
C
K
O
S
T
P
P