ADP3334ARZ Analog Devices Inc, ADP3334ARZ Datasheet - Page 7

IC REG LDO ADJ 500MA 8-SOIC

ADP3334ARZ

Manufacturer Part Number
ADP3334ARZ
Description
IC REG LDO ADJ 500MA 8-SOIC
Manufacturer
Analog Devices Inc
Series
anyCAP®r
Datasheet

Specifications of ADP3334ARZ

Design Resources
Broadband Low EVM Direct Conversion Transmitter (CN0134) Broadband Low EVM Direct Conversion Transmitter Using LO Divide-by-2 Modulator (CN0144)
Regulator Topology
Positive Adjustable
Voltage - Output
1.5 ~ 10 V
Voltage - Input
2.6 ~ 11 V
Voltage - Dropout (typical)
0.2V @ 500mA
Number Of Regulators
1
Current - Output
500mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Primary Input Voltage
11V
Output Voltage Adjustable Range
1.5V To 10V
Dropout Voltage Vdo
200mV
No. Of Pins
8
Output Current
500mA
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Limit (min)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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To have the lowest possible sensitivity of the output voltage to
temperature variations, it is important that the value of the parallel
resistance of R1 and R2 be kept as close as possible to 50 kW.
Also, for the best accuracy over temperature, the feedback volt-
age should be set for 1.178 V:
where V
band gap voltage. Note that V
FB pin due to loading by the internal PTAT current.
Combining the above equations and solving for R1 and R2 gives
the following formulas:
V
1.5
1.8
2.2
2.7
3.3
5.0
10.0
Using standard 1% values, as shown in Table I, will sacrifice
some output voltage accuracy. To estimate the overall output
voltage accuracy, it is necessary to take into account all sources
of error. The accuracy given in the specifications table does not
take into account the error introduced by the feedback resistor
divider ratio or the error introduced by the parallel combination
of the feedback resistors.
The error in the parallel combination of the feedback resistors
causes the reference to have a wider variation over temperature.
To estimate the variation, calculate the worst-case error from
50 kW, and then use the graph in Figure 4 to estimate the
additional change in the output voltage over the operating
temperature range.
For example:
V
V
R1 = 140 kW, 1%
R2 = 78.7 kW, 1%
REV. B
OUT
IN
OUT
= 5 V
V
R
R
R
R
(V)
= 3.3 V
FB
1 50
1
2
1
OUT
¥
+
=
=
=
R
R
Ê
Á
Ë
V
1
2
2
R1 (1% Resistor) (k )
63.4
76.8
93.1
115.0
140.0
210.0
422.0
is the desired output voltage and V
OUT
Table I. Feedback Resistor Selection
k
50
-
=
W
V
V
50
k
OUT
¥
¥
W
FB
Ê
Á
Ë
Ê
Á
Ë
k
V
W
R
V
ˆ
˜
¯
OUT
1
FB
R
+
2
R
ˆ
˜
¯
2
ˆ
˜
¯
FB
does not actually appear at the
R2 (1% Resistor) (k )
232.0
147.0
107.0
88.7
78.7
64.9
56.2
FB
is the virtual
(1)
(2)
(3)
(4)
–7–
The actual output voltage can be calculated using the following
equation.
So worst-case error will occur when R1 has a –1% tolerance and
R2 has a +1% tolerance. Recalculating the output voltage, the
parallel resistance and error are:
So, from the graph in Figure 4, the output voltage error is
estimated to be an additional 0.25%. The error budget is
1.8% (the initial output voltage accuracy over temperature),
plus 2.1% (resistor divider error), plus 0.25% (parallel resis-
tance error) for a worst-case total of 4.15%.
Thermal Overload Protection
The ADP3334 is protected against damage from excessive power
dissipation by its thermal overload protection circuit, which limits
the die temperature to a maximum of 165°C. Under extreme
conditions (i.e., high ambient temperature and power dissipation)
where die temperature starts to rise above 165°C, the output
current is reduced until the die temperature has dropped to a safe
level. The output current is restored when the die temperature
is reduced.
V
V
V
V
Resistor Divider Error
R
R
OUT
OUT
OUT
OUT
PARALLEL
PARALLEL
Figure 4. Output Voltage Error vs.
Parallel Resistance Error
3.0
2.5
2.0
1.5
1.0
0.5
=
=
=
=
0
0
1 178
1 178
3 274
3 232
.
.
.
.
=
Error
R
R
V
V
V
V
1
1
¥
+
¥
¥
2
=
R
R
Ê
Á
Ë
Ê
Á
Ë
2
2
138 6
Ê
Á
Ë
R
R
79 5
50 51
1
2
=
=
50
.
.
138 6 79 5
138 6 79 5
.
+
Ê
Á
Ë
Rp ERROR – %
3 232
1
3
+
ˆ
˜
¯
.
3 3
-
.
.
.
1
1
ˆ
˜
¯
¥
ˆ
˜ ¥
¯
+
-
100
1
.
.
4
ˆ
˜ ¥
¯
%
=
100
50 51
ADP3334
=
1 02
.
%
.
5
= -
k
%
W
2 1
. %
6
(5)
(6)
(7)

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