EVAL-ADF7012EB1 Analog Devices Inc, EVAL-ADF7012EB1 Datasheet - Page 18

• Manufacturer Part Number: EVAL-ADF7012EB1
• Description: BOARD EVALUATION FOR EB1 ADF7012
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADF7012EB1

• Module/board Type: Evaluation Board
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: ADF7020 928MHz
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant

ADF7012
TIPS ON DESIGNING THE LOOP FILTER
The loop filter design is crucial in ensuring stable operation
of the transmitter, meeting adjacent channel power (ACP)
specifications, and meeting spurious requirements for the
relevant regulations. ADIsimSRD Design Studio™ is a free tool
available to aid the design of loop filters. The user enters the
desired frequency range, the reference crystal and PFD values,
and the desired loop bandwidth. ADIsimSRD Design Studio
gives a good starting point for the filter, and the filter can be
further optimized based on the criteria below.
Setting Tuning Sensitivity Value
The tuning sensitivity or kV, usually denoted in MHz/V, is
required for the loop filter design. It refers to the amount that
a change of a volt in the voltage applied to the VCO
changes the output frequency. Typical data for the ADF7012
over a frequency range is shown.
Charge-Pump Current
The charge-pump current allows the loop filter bandwidth to be
changed using the registers. The loop bandwidth reduces as the
charge pump current is reduced and vice versa.
Selecting Loop Filter Bandwidth
Data Rate
The loop filter bandwidth should usually be at two to three
times the data rate. This ensures that the PLL has ample time
to jump between the mark and space frequencies.
ACP
In the case where the ACP specifications are difficult to meet,
the loop filter bandwidth can be reduced further to reduce the
phase noise at the adjacent channel. The filter rolls off at 20 dB
per decade.
120
100
80
60
40
20
0
200
300
Figure 37. kV vs. VCO Frequency
400
500
FREQUENCY (MHz)
600
700
800
900
1000
IN
pin,
1100
Rev. A | Page 18 of 28
Spurious Levels
In the case where the output power is quite high, a reduced loop
filter bandwidth reduces the spurious levels even further, and
provides additional margin on the specification.
The following sections provide examples of loop filter designs
for typical applications in specific frequencies.
PA MATCHING
The ADF7012 exhibits optimum performance in terms of
transmit power and current consumption only if the RF output
port is properly matched to the antenna impedance.
ZOPT_PA depends primarily on the required output power,
and the frequency range. Selecting the optimum ZOPT_PA
helps to minimize the current consumption. This data sheet
contains a number of matching networks for common fre-
quency bands. Under certain conditions it is recommended
to obtain a suitable ZOPT_PA value by means of a load-pull
measurement.
The impedance matching values provided in the next section
are for 50 Ω environments. An additional matching network
may be required after the harmonic filter to match to the
antenna impedance. This can be incorporated into the filter
design itself in order to reduce external components.
TRANSMIT PROTOCOL AND CODING
CONSIDERATIONS
A dc-free preamble pattern such as 10101010… is recom-
mended for FSK/ASK/OOK demodulation. Preamble patterns
with longer run-length constraints such as 11001100…. can also
be used. However, this can result in a longer synchronization
time of the received bit stream in the chosen receiver.
PREAMBLE
ANTENNA
Figure 39. Typical Format of a Transmit Protocol
Figure 38. ADF7012 with Harmonic Filter
WORD
SYNC
LPF
FIELD
ID
ZOPT_PA
DV
DD
DATA FIELD
RF
OUT
PA
CRC