ATA5811-PLHC Atmel, ATA5811-PLHC Datasheet - Page 27

• Manufacturer Part Number: ATA5811-PLHC
• Description: IC TXRX UHF ASK/FSK 1CH 48-QFN
• Manufacturer: Atmel

Specifications of ATA5811-PLHC

• Frequency: 433MHz, 868MHz
• Data Rate - Maximum: 20kbps
• Modulation Or Protocol: ASK, FSK
• Applications: Access Control, AMR, RKE
• Power - Output: 5dBm
• Sensitivity: -116dBm
• Voltage - Supply: 2.4 V ~ 3.6 V or 4.4 V ~ 6 V
• Current - Receiving: 10.5mA
• Current - Transmitting: 16mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Memory Size: -
• Other names: ATA5811-PLHCTR; ATA5811-PLQ; ATA5811-PLQTR; ATA5811-PLQTR

7. Power Supply
Figure 7-1.
4689F–RKE–08/06
PWR_ON
VSINT
(Control register 3)
VAUX
VSOUT_EN
Power Supply
(Command via SPI)
(Control register 1)
VS1
VS2
DVCC_OK
AVCC_EN
T1
T5
OFFCMD
to
VS1+
0.55V
typ.
IN
The clock cycle of the Bit-check and the TX bit rate depends on the selected bit-rate range
(BR_Range) which is defined in control register 6 (see
is defined in control register 4 (see
the following formulas for further reference:
BR_Range
+
-
3.25V typ.
V_REG2
1
1
(Status register)
EN
S
0
0
1
1
P_On_Aux
R
0
1
0
1
IN
S
R
Q
no change
0
1
1
FF1
OUT
Q
3.25V typ.
V_REG1
EN
and
OUT
SW_VSOUT
Table 9-13 on page
BR_Range 0: T
BR_Range 1: T
BR_Range 2: T
BR_Range 3: T
SW_AVCC
SW_DVCC
XDCLK
XDCLK
XDCLK
XDCLK
37). This clock cycle T
Table 9-20 on page
2.38V typ.)
V_Monitor
(1.5V typ.)
V_Monitor
(2.3V/
ATA5811/ATA5812
= 8
= 4
= 2
= 1
T
T
T
T
DCLK
DCLK
DCLK
DCLK
DVCC_OK
(to XTO and
Reset Logic)
VSOUT_OK
(to XTO and
Reset Logic)
Low_Batt
(Status Register
and Reset Logic)
AVCC
DVCC
VSOUT
XLim
XLim
XLim
XLim
39) and XLim which
XDCLK
is defined by
27