TXC101 RFM, TXC101 Datasheet - Page 20

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TXC101

Manufacturer Part Number
TXC101
Description
IC TX 300MHZ-1GHZ 16-TSSOP
Manufacturer
RFM
Series
TXr
Datasheet

Specifications of TXC101

Frequency
300MHz ~ 1GHz
Applications
General Data Transfer
Modulation Or Protocol
FSK, OOK
Data Rate - Maximum
512kbps
Power - Output
3dBm
Current - Transmitting
13mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
2.2 V ~ 5.4 V
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Other names
583-1098-2

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The Sleep Command Register defines the byte command and the number of clock cycles to generate after a sleep instruction to put
the chip into sleep mode. When the chip sees this command issued, it immediately disables the power amplifier, turns off the
synthesizer, and turns off the oscillator after SLP[7..0] (0-256) clock cycles.
Bit [15..8] – Command Code: These bits are the command code that is sent serially to the processor that identifies the bits to be
Bit [7..0] – Sleep Command Value: These bits define the number of clock cycles to generate before disabling the oscillator and
Wake-up Timer Period Register
The Wake-up Timer Period register sets the wake-up interval for the TXC101. After setting the wake-up interval, the WKUPEN (bit 1
of Power Management Register) should be cleared and set at the end of every wake-up cycle. To calculate the wake-up interval
desired, use the following:
Bit [15..13] – Command Code: These bits are the command code that is sent serially to the processor that identifies the bits to be
Bit [12..8] – Exponential: These bits define the exponential value as used in the above equation. The value used must be the
Bit [7..0] – Multiplier: These bits define the multiplier value as used in the above equation. The value used must be the decimal
equivalent between 0 and 255.
Battery Detect Threshold Register
The Battery Detect Threshold and Clock Output Register configures the following:
The Low Battery Threshold is programmable from 2.2V to 5.3V using the following equation:
where LBD[4..0] is the decimal value 0 to 31.
Bit [15..8] - Command Code: These bits are the command code that is sent serially to the processor that identifies the bits to be
Bit [7..5] – Not Used. Write a logic ‘0’.
Bit [4..0] – Low Battery Detect Value: These bits set the decimal value as used in the equation above to calculate the battery
The Low Battery Detect can be enabled by setting the LBDEN bit (2) of the Power Management Register and disabled by clearing
the bit.
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Bit
15
Bit
15
1
1
Bit
14
Bit
1
14
Low Battery Detect Threshold
1
before the chip goes into sleep mode. This allows time for an external processor to perform any memory or pre-sleep
functions before the clock is stopped and the device enters sleep mode.
where MUL[7..0] = decimal value 0 to 255 and R[4..0] = decimal value 0 to 31.
written to the Battery Detect Threshold Register.
detect threshold voltage value. When the battery level falls 50mV below this value, the LBD bit (5) in the status register is
set indicating that the battery level is below the programmed threshold. This is useful in monitoring discharge sensitive
batteries such as Lithium cells.
written to the Sleep Command Register.
written to the Wake-up Timer Period register.
decimal equivalent between 0 and 31.
Bit
13
1
Bit
13
0
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Bit
R4
12
Bit
12
0
T
WAKE
Bit
R3
11
Bit
11
0
= MUL[7..0] * 2
R2
Bit
10
Bit
10
0
R1
Bit
[POR=E000h]
9
VT = (LBD[4..0] / 10) + 2.2 (V)
Bit
9
1
[POR=C200h]
R0
Bit
8
R[4..0]
Bit
8
0
MUL7
Bit
7
Bit
7
0
MUL6
Bit
6
Bit
6
0
MUL5
Bit
5
Bit
5
0
MUL4
Bit
LBD4
4
Bit
4
MUL3
LBD3
Bit
3
Bit
3
MUL2
LBD2
Bit
2
Bit
2
TXC101 - 4/8/08
MUL1
LBD1
Bit
Bit
1
Page 20 of 27
1
MUL0
LBD0
Bit
Bit
0
0

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