WM9090ECS/R Wolfson Microelectronics, WM9090ECS/R Datasheet - Page 16

Audio CODECs Audio Subsystem w/ capless headphones

WM9090ECS/R

Manufacturer Part Number
WM9090ECS/R
Description
Audio CODECs Audio Subsystem w/ capless headphones
Manufacturer
Wolfson Microelectronics
Datasheets

Specifications of WM9090ECS/R

Interface Type
2-Wire, l2C
Thd Plus Noise
80 dB
Ic Function
Ultra Low Power Audio Subsystem
Brief Features
Mono Class D Speaker Driver, Automatic Gain Control (AGC)
Supply Voltage Range
2.7V To 5.5V
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
WM9090
w
INPUT PGA CONFIGURATION
The input PGAs can be configured in single-ended mode or differential mode, using the IN1_DIFF
and IN2_DIFF register bits described in Table 2.
In single-ended mode, an input pin is routed to each individual PGA. In differential mode, a pair of
input pins is routed to PGA IN1A or IN2A.
Table 2 Input PGA Configuration
INPUT PGA VOLUME CONTROL
Each of the four input PGAs has an independently controlled gain range of -6dB to +18dB. The gains
on the inverting and non-inverting inputs to the PGAs are always equal. Each Input PGA can be
independently muted using the PGA mute bits as described in Table 3.
Note that, when input pins IN1P and IN1N are configured in differential mode, then PGA IN1B is not
used, and the volume control is provided on PGA IN1A only.
Note that, when input pins IN2P and IN2N are configured in differential mode, then PGA IN2B is not
used, and the volume control is provided on PGA IN2A only.
The gain level of PGA IN1A and IN2A differs between single-ended and differential mode. For
example, a 0dB volume setting provides 0dB gain in differential mode, but in single-ended mode it
will apply +6dB gain. In single-ended mode, the IN1A/IN2A input PGAs have a controlled gain range
of 0dB to +24dB. In differential mode, these PGAs have a controlled gain range of -6dB to +18dB.
To prevent "zipper noise", a zero-cross function is provided on the input PGAs. When this feature is
enabled, volume updates will not take place until a zero-crossing is detected. In the case of a long
period without zero-crossings, a timeout function is provided. When the zero-cross function is
enabled, the volume will update after the timeout period if no earlier zero-cross has occurred. The
timeout clock is enabled using TOCLK_ENA, the timeout period is set by TOCLK_RATE. See
“Clocking Control” for more information on these fields.
The IN1_VU and IN2_VU bits control the loading of the input PGA volume data. When IN1_VU and
IN2_VU are set to 0, the PGA volume data will be loaded into the respective control register, but will
not actually change the gain setting. The IN1A and IN1B volume settings are both updated when a 1
is written to IN1_VU; the IN2A and IN2B volume settings are both updated when a 1 is written to
IN2_VU. This makes it possible to update the gain of two single-ended input paths simultaneously.
Note that, in differential input modes, the Volume Update control bits IN1_VU and/or IN2_VU should
always be set to 1.
The Input PGA Volume Control register fields are described in Table 3.
R22 (16h)
IN1 Line
Control
R23 (17h)
IN2 Line
Control
R24 (18h)
IN1 Line Input
A Volume
REGISTER
REGISTER
ADDRESS
ADDRESS
BIT
BIT
1
1
8
7
6
IN1_DIFF
IN2_DIFF
IN1_VU
IN1A_MUTE
IN1A_ZC
LABEL
LABEL
DEFAULT
N/A
1
0
DEFAULT
1
1
IN1 Volume Update
Writing a 1 to this bit will cause IN1A and
IN1B input PGA volumes to be updated
simultaneously
IN1A PGA Mute
0 = Un-Mute
1 = Mute
IN1A PGA Zero Cross Control
0 = Change gain immediately
1 = Change gain on zero cross only
PGA IN1A and IN1B configuration
0 = Single-ended mode
1 = Differential mode
PGA IN2A and IN2B configuration
0 = Single-ended mode
1 = Differential mode
DESCRIPTION
PP, January 2010, Rev 3.0
DESCRIPTION
Pre-Production
16

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