WM8352GEB/V Wolfson Microelectronics, WM8352GEB/V Datasheet - Page 57

• Manufacturer Part Number: WM8352GEB/V
• Description: Audio CODECs Audio CODEC plus pwr management
• Manufacturer: Wolfson Microelectronics

Specifications of WM8352GEB/V

• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Conversion Rate: 48 KSPS
• Interface Type: Serial (2-Wire, 3-Wire, 4-Wire)
• Resolution: 12 bit
• Operating Supply Voltage: 3.7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• Minimum Operating Temperature: - 25 C
• Number Of Channels: 2 ADC/2 DAC
• Supply Current: 260 uA
• Thd Plus Noise: - 83 dB
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 8
• No. Of Output Channels: 6
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 95dB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
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Table 17 FLL Control Registers
R43 (2Bh)
FLL Control
2
R44 (2Ch)
FLL Control
3
R45 (2Dh)
FLL Control
4
REGISTER
ADDRESS
15:11
15:0
BIT
7:4
2:0
9:0
1:0
7
5
FLL_RSP_RAT
E
FLL_RATE
[2:0]
FLL_RATIO
[4:0]
FLL_N [9:0]
FLL_K [15:0]
FLL_REF_FRE
Q
FLL_FRAC
FLL_CLK_SRC
[1:0]
LABEL
DEFAULT
C226h
(0Eh)
0000
086h
000
14
00
0
0
111 = Reserved
FLL Loop Gain
0000 = x 1 (Recommended value)
0001 = x 2
0010 = x 4
0011 = x 8
0100 = x 16
0101 = x 32
0110 = x 64
0111 = x 128
1000 = x 256
Recommended that these are not
changed from default.
Frequency of the FLL control block
000 = F
001 = F
010 = F
011 = F
100 = F
101 = F
Recommended that these are not
changed from default.
CLK_VCO is divided by this integer, valid
from 1 .. 31.
1 recommended for high freq reference
8 recommended for low freq reference
FLL integer multiplier N for CLK_REF
FLL fractional multiplier K for CLK_REF.
This is only used if FLL_FRAC is set.
Low frequency reference locking
0 = High frequency reference locking
(recommended for reference clock >
48kHz)
1 = Lock frequency reference locking
(recommended for reference clock <=
48kHz)
Fractional enable
0 = Integer Mode
1 = Fractional Mode
1 recommended in all cases
Select FLL input clock Source
00 = MCLK
01 = DACLRCLK
10 = ADCLRCLK
11 = CLK_32K_REF
VCO
VCO
VCO
VCO
VCO
VCO
/ 1 (Recommended value)
/ 2
/ 4
/ 8
/ 16
/ 32
DESCRIPTION
PD, March 2010, Rev 4.2
WM8352
57