PIC18F6680-I/L Microchip Technology, PIC18F6680-I/L Datasheet - Page 120

Microcontrollers (MCU) 64KB 3328 RAM 52 I/O

PIC18F6680-I/L

Manufacturer Part Number
PIC18F6680-I/L
Description
Microcontrollers (MCU) 64KB 3328 RAM 52 I/O
Manufacturer
Microchip Technology
Datasheet

Specifications of PIC18F6680-I/L

Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
I2C/SPI/AUSART/CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Program Memory Type
Flash
Program Memory Size
64 KB
Package / Case
PLCC-68
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F6680-I/L
Manufacturer:
RUBYCON
Quantity:
46 000
Part Number:
PIC18F6680-I/L
Manufacturer:
MICROCH
Quantity:
20 000
PIC18F6585/8585/6680/8680
REGISTER 9-8:
DS30491C-page 118
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
bit 7
Unimplemented: Read as ‘0’
CMIE: Comparator Interrupt Enable bit
1 = Enables the comparator interrupt
0 = Disables the comparator interrupt
Unimplemented: Read as ‘0’
EEIE: Data EEPROM/Flash Write Operation Interrupt Enable bit
1 = Enables the write operation interrupt
0 = Disables the write operation interrupt
BCLIE: Bus Collision Interrupt Enable bit
1 = Enables the bus collision interrupt
0 = Disables the bus collision interrupt
LVDIE: Low-Voltage Detect Interrupt Enable bit
1 = Enables the Low-Voltage Detect interrupt
0 = Disables the Low-Voltage Detect interrupt
TMR3IE: TMR3 Overflow Interrupt Enable bit
1 = Enables the TMR3 overflow interrupt
0 = Disables the TMR3 overflow interrupt
CCP2IE: CCP2 Interrupt Enable bit
1 = Enables the CCP2 interrupt
0 = Disables the CCP2 interrupt
Legend:
R = Readable bit
- n = Value at POR
U-0
R/W-0
CMIE
U-0
W = Writable bit
‘1’ = Bit is set
R/W-0
EEIE
BCLIE
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
LVDIE
 2004 Microchip Technology Inc.
x = Bit is unknown
TMR3IE
R/W-0
CCP2IE
R/W-0
bit 0

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