PIC18F6680-I/L Microchip Technology, PIC18F6680-I/L Datasheet - Page 487

• Manufacturer Part Number: PIC18F6680-I/L
• Description: Microcontrollers (MCU) 64KB 3328 RAM 52 I/O
• Manufacturer: Microchip Technology

Specifications of PIC18F6680-I/L

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: I2C/SPI/AUSART/CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Package / Case: PLCC-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TRISE Register
TSTFSZ ............................................................................ 405
Two-Word Instructions
TXSTA Register
U
USART
 2004 Microchip Technology Inc.
SPI Mode (Slave Mode with
Stop Condition Receive or
Synchronous Reception
Synchronous Transmission....................................... 244
Synchronous Transmission
Time-out Sequence on POR w/PLL
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Timer0 and Timer1 External Clock ........................... 433
Transition Between Timer1 and OSC1
Transition Between Timer1 and OSC1
Transition Between Timer1 and OSC1
Transition Between Timer1 and
Transition from OSC1 to
USART Synchronous Receive
USART Synchronous Transmission
Wake-up from Sleep via Interrupt ............................. 358
PSPMODE Bit................................................... 133, 152
Example Cases........................................................... 58
BRGH Bit .................................................................. 233
Asynchronous Mode ................................................. 237
CKE = 1) ........................................................... 196
Transmit Mode .................................................. 222
(Master Mode, SREN) ...................................... 246
(Through TXEN) ............................................... 245
Enabled (MCLR Tied to V
via 1 k Resistor) ............................................... 50
(MCLR Not Tied to V
Case 1 ................................................................ 49
Case 2 ................................................................ 49
(MCLR Tied to V
via 1 k Resistor) ............................................... 49
(EC with PLL Active, SCS1 = 1) ......................... 29
(HS with PLL Active, SCS1 = 1) ......................... 29
(HS, XT, LP) ....................................................... 28
OSC1 (RC, EC) .................................................. 30
Timer1 Oscillator................................................. 28
(Master/Slave) .................................................. 445
(Master/Slave) .................................................. 445
12-bit Break Transmit and
Associated Registers, Receive ......................... 241
Associated Registers, Transmit ........................ 239
Auto-Wake-up on Sync Break .......................... 242
Receiver............................................................ 240
Setting up 9-bit Mode with
Transmitter........................................................ 237
Receive..................................................... 243
Address Detect ......................................... 240
DD
DD
)
DD
PIC18F6585/8585/6680/8680
USART Synchronous Receive
USART Synchronous Transmission
V
Voltage Reference Specifications..................................... 423
W
Wake-up from Sleep ................................................. 345, 357
Watchdog Timer (WDT)............................................ 345, 355
WCOL ............................................................................... 217
WCOL Status Flag.................................... 217, 218, 219, 222
WWW, On-Line Support ....................................................... 7
X
XORLW ............................................................................ 405
XORWF ............................................................................ 406
Baud Rate Generator (BRG) .................................... 233
Serial Port Enable (SPEN Bit) .................................. 229
Synchronous Master Mode....................................... 244
Synchronous Slave Mode......................................... 247
Requirements ........................................................... 445
Requirements ........................................................... 445
Using Interrupts ........................................................ 357
Associated Registers................................................ 356
Control Register........................................................ 355
Postscaler......................................................... 355, 356
Programming Considerations ................................... 355
RC Oscillator ............................................................ 355
Time-out Period ........................................................ 355
Associated Registers........................................ 233
Auto-Baud Rate Detect..................................... 236
Baud Rate Error, Calculating............................ 233
Baud Rates, Asynchronous
High Baud Rate Select
Sampling .......................................................... 233
Associated Registers,
Associated Registers,
Reception ......................................................... 246
Transmission .................................................... 244
Associated Registers,
Associated Registers,
Reception ......................................................... 248
Transmission .................................................... 247
Modes....................................................... 234
(BRGH Bit) ............................................... 233
Reception ................................................. 246
Transmit ................................................... 245
Receive .................................................... 248
Transmit ................................................... 247
DS30491C-page 485