MMA8453QT Freescale Semiconductor, MMA8453QT Datasheet - Page 40

• Manufacturer Part Number: MMA8453QT
• Description: Board Mount Accelerometers LOW G 3-AXIS DGTL ACCEL
• Manufacturer: Freescale Semiconductor

Specifications of MMA8453QT

• Sensing Axis: X, Y, Z
• Acceleration: 2 g, 4 g, 8 g
• Digital Output - Number Of Bits: 8 bit, 10 bit
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.95 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Digital Output - Bus Interface: I2C
• Shutdown: Yes
• Sensitivity: 256 count/g, 512 count/g, 1024 count/g
• Package / Case: QFN-16
• Output Type: Digital
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.6
specified in the DR[2:0] register to ASLP_RATE register value, provided the SLPE bit is set to a logic ‘1’ in the CTRL_REG2
register. See
value depend on the ODR chosen as shown in
CTRL_REG3. All enabled functions will still function in SLEEP mode at the SLEEP ODR. Only the functions that have been
selected for WAKE from SLEEP will WAKE the device.
Motion/FF. One or more of these functions can be enabled. In order to WAKE the device, 4 functions are provided namely,
Transient, Orientation, T ap, and the Motion/Freefall. The Auto-WAKE/SLEEP interrupt does not affect the WAKE/SLEEP, nor does
the data ready interrupt. See Register 0x2C for the WAKE from SLEEP bits.
interrupt is enabled, transitioning from ACTIVE mode to Auto-SLEEP mode and vice versa generates an interrupt.
Table 50. ASLP_COUNT Description
40
MMA8453Q
0x29 ASLP_COUNT Register (Read/Write)
The ASLP_COUNT register sets the minimum time period of inactivity required to change current ODR value from the value
D7-D0 defines the minimum duration time to change current ODR value from DR to ASLP_RATE. Time step and maximum
In order to wake the device, the desired function or functions must be enabled in CTRL_REG4 and set to WAKE to SLEEP in
MMA8453Q has 4 functions that can be used to keep the sensor from falling asleep namely, Transient, Orientation, T ap, and
If the Auto-SLEEP bit is disabled, then the device can only toggle between STANDBY and WAKE mode. If Auto-SLEEP
Bit 7
D7
D[7:0]
Auto-WAKE/SLEEP Detection
Table 45
Table 51. ASLP_COUNT Relationship with ODR
Table 52. SLEEP/WAKE Mode Gates and Triggers
Duration value. Default value: 0000_0000.
Bit 6
for functional blocks that may be monitored for inactivity in order to trigger the “return to SLEEP” event.
D6
Output Data Rate
Interrupt Source
12.5 Hz
6.25 Hz
1.56 Hz
800 Hz
400 Hz
200 Hz
100 Hz
SRC_LNDPRT
(ODR)
50 Hz
SRC_TRANS
SRC_PULSE
SRC_FF_MT
SRC_DRDY
SRC_ASLP
Bit 5
D5
Table
Duration
0 to 162s
0 to 81s
0 to 81s
0 to 81s
0 to 81s
0 to 81s
0 to 81s
0 to 81s
Event Restarts Timer and
Delays Return to SLEEP
Bit 4
51.
D4
Yes
Yes
Yes
Yes
No*
No
ODR Time Step
Bit 3
D3
1.25 ms
160 ms
640 ms
2.5 ms
10 ms
20 ms
80 ms
5 ms
Event will WAKE from SLEEP
Bit 2
D2
ASLP_COUNT Step
Yes
Yes
Yes
Yes
No*
No
320 ms
320 ms
320 ms
320 ms
320 ms
320 ms
320 ms
640 ms
Bit 1
Freescale Semiconductor
D1
Bit 0
D0
Sensors