STM32F103TBU6 STMicroelectronics, STM32F103TBU6 Datasheet - Page 60

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STM32F103TBU6

Manufacturer Part Number
STM32F103TBU6
Description
IC ARM CORTEX MCU 128KB 36VFQFPN
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F103TBU6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
26
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
36-VFQFN Exposed Pad
Core
ARM Cortex M3
Featured Product
STM32 Cortex-M3 Companion Products
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
For Use With
497-11038 - BOARD DEMO FUEL GAUGE STM32

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Electrical characteristics
5.3.13
Table 35.
1. FT = Five-volt tolerant. In order to sustain a voltage higher than V
2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization, not tested in production.
3. With a minimum of 100 mV.
4. Leakage could be higher than max. if negative current is injected on adjacent pins.
5. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This
60/99
Symbol
V
R
R
C
V
V
I
disabled.
PMOS/NMOS contribution
lkg
hys
PU
PD
IH
IO
IL
Standard IO input low
level voltage
IO FT
voltage
Standard IO input high
level voltage
IO FT
voltage
Standard IO Schmitt
trigger voltage
hysteresis
IO FT Schmitt trigger
voltage hysteresis
Input leakage current
Weak pull-up equivalent
resistor
Weak pull-down
equivalent resistor
I/O pin capacitance
I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in
performed under the conditions summarized in
compliant.
I/O static characteristics
(1)
(1)
Parameter
(5)
input low level
input high level
(2)
to the series resistance is minimum
(2)
(5)
(4)
V
V
V
DD
DD
Standard I/Os
SS
Conditions
V
V
> 2 V
V
I/O FT
IN
IN
IN
2 V
V
=
=
= 5 V
IN
V
V
DD
Doc ID 13587 Rev 13
SS
V
DD
(~10% order)
0.41*(V
0.42*(V
5% V
DD
DD
+0.3 the internal pull-up/pull-down resistors must be
DD
–0.3
–0.3
Min
200
30
30
-2 V)+1.3 V
Table
-2 V)+1 V
DD
.
(3)
Table 35
9. All I/Os are CMOS and TTL
Typ
40
40
STM32F103x8, STM32F103xB
5
are derived from tests
0.32*(V
0.28*(V
V
DD
DD
DD
Max
5.5
5.2
50
50
±1
-2V)+0.75 V
-2 V)+0.8 V
3
+0.3
Unit
mV
mV
µA
pF
V
V
V
V

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