SST25LF020A-33-4C-SAE Microchip Technology, SST25LF020A-33-4C-SAE Datasheet - Page 9
SST25LF020A-33-4C-SAE
Manufacturer Part Number
SST25LF020A-33-4C-SAE
Description
IC FLASH SER 2MB 33HZ SPI 8SOIC
Manufacturer
Microchip Technology
Datasheet
1.SST25LF020A-33-4C-SAE.pdf
(25 pages)
Specifications of SST25LF020A-33-4C-SAE
Memory Type
FLASH
Memory Size
2M (256K x 8)
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (0.154", 3.90mm Width)
Format - Memory
FLASH
Speed
33MHz
Interface
SPI Serial
Voltage - Supply
3 V ~ 3.6 V
Architecture
Sectored
Interface Type
SPI
Access Time
33 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Current
10 mA
Mounting Style
SMD/SMT
Organization
4 KB x 64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SST25LF020A-33-4C-SAE
Manufacturer:
MICROCHIPS
Quantity:
10 002
Part Number:
SST25LF020A-33-4C-SAE
Manufacturer:
SST
Quantity:
20 000
Company:
Part Number:
SST25LF020A-33-4C-SAE-T
Manufacturer:
HITACHI
Quantity:
651
Part Number:
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Manufacturer:
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Quantity:
20 000
2 Mbit SPI Serial Flash
SST25LF020A
Read (20 MHz)
The Read instruction supports up to 20 MHz, it outputs the
data starting from the specified address location. The data
output stream is continuous through all addresses until ter-
minated by a low to high transition on CE#. The internal
address pointer will automatically increment until the high-
est memory address is reached. Once the highest memory
address is reached, the address pointer will automatically
increment to the beginning (wrap-around) of the address
©2010 Silicon Storage Technology, Inc.
FIGURE 5: Read Sequence
SCK
CE#
SO
SI
MODE 3
MODE 0
MSB
0 1 2 3 4 5 6 7 8
03
HIGH IMPEDANCE
MSB
ADD.
15 16
ADD.
23 24
9
ADD.
space, i.e. for 2 Mbit density, once the data from address
location 3FFFFH had been read, the next output will be
from address location 00000H.
The Read instruction is initiated by executing an 8-bit com-
mand, 03H, followed by address bits [A
remain active low for the duration of the Read cycle. See
Figure 5 for the Read sequence.
MSB
31 32
D
OUT
N
39 40
D
N+1
OUT
47 48
D
N+2
OUT
55 56
D
N+3
OUT
63 64
D
N+4
S71242-07-000
OUT
23
-A
1242 F04.0
70
0
]. CE# must
Data Sheet
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