TOP266KG Power Integrations, TOP266KG Datasheet - Page 21

• Manufacturer Part Number: TOP266KG
• Description: IC OFFLINE SWITCHER 39W 58W
• Manufacturer: Power Integrations
• Series: TOPSwitch®-JXr

Specifications of TOP266KG

• Output Isolation: Isolated
• Frequency Range: 66 ~ 132kHz
• Voltage - Output: 725V
• Power (watts): 39W
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 12-BSOP (0.350", 8.89mm Width) Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 596-1399

located close to the CONTROL and SOURCE pins of TOP264-271
and away from the drain and clamp component traces. The
primary side clamp circuit should be positioned such that the loop
area from the transformer end (shared with DRAIN) and the clamp
capacitor is minimized. The bias winding return node should be
connected via a dedicated trace directly to the bulk capacitor
and not to the SOURCE pins. This ensures that surge currents
are routed away from the SOURCE pins of the TOPSwitch-JX.
Y Capacitor
The Y capacitor should be connected close to the secondary
output return pin(s) and the positive primary DC input pin of the
transformer. If the Y capacitor is returned to the negative end of
the input bulk capacitor (rather than the positive end) a dedicated
trace must be used to make this connection. This is to “steer”
leakage currents away from the SOURCE pins in case of a
common-mode surge event.
Heat Sinking
The exposed pad of the E package (eSIP-7C), K package
(eSOP-12) and the V package (eDIP-12) are internally electrically
tied to the SOURCE pin. To avoid circulating currents, a heat
sink attached to the exposed pad should not be electrically tied
to any primary ground/source nodes on the PC board. On
double sided boards, topside and bottom side areas connected
with vias can be used to increase the effective heat sinking
area. The K package exposed pad may be directly soldered to
a copper area for optimum thermal transfer. In addition,
sufficient copper area should be provided at the anode and
cathode leads of the output diode(s) for heat sinking. In Figure 29,
a narrow trace is shown between the output rectifier and output
filter capacitor. This trace acts as a thermal relief between the
rectifier and filter capacitor to prevent excessive heating of the
capacitor.
Quick Design Checklist
In order to reduce the no-load input power of TOP264-271
designs, the V pin operates at very low current. This requires
careful layout considerations when designing the PCB to avoid
noise coupling. Traces and components connected to the V pin
should not be adjacent to any traces carrying switching currents.
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These include the drain, clamp network, bias winding return or
power traces from other converters. If the line sensing features
are used, then the sense resistors must be placed within 10 mm
of the V pin to minimize the V pin node area. The DC bus
should then be routed to the line sense resistors. Note that
external capacitance must not be connected to the V pin as this
may cause misoperaton of the V pin related functions. As with
any power supply design, all TOP264-271 designs should be
verified on the bench to make sure that components specifi-
cations are not exceeded under worst-case conditions. The
following minimum set of tests is strongly recommended:
1. Maximum drain voltage – Verify that peak V
2. Maximum drain current – At maximum ambient temperature,
3. Thermal check – At maximum output power, both minimum
Design Tools
Up-to-date information on design tools can be found at the
Power Integrations website: www.powerint.com
exceed 675 V at highest input voltage and maximum
overload output power. Maximum overload output power
occurs when the output is overloaded to a level just before
the power supply goes into auto-restart (loss of regulation).
maximum input voltage and maximum output load, verify
drain current waveforms at start-up for any signs of trans-
former saturation and excessive leading edge current spikes.
TOP264-271 has a leading edge blanking time of 220 ns to
prevent premature termination of the ON-cycle. Verify that
the leading edge current spike is below the allowed current
limit envelope (see Figure 34) for the drain current waveform
at the end of the 220 ns blanking period.
and maximum voltage and ambient temperature; verify that
temperature specifications are not exceeded for TOP264-
271, transformer, output diodes and output capacitors.
Enough thermal margin should be allowed for the part-to-
part variation of the R
the data sheet. The margin required can either be calculated
from the values in the parameter table or it can be accounted
for by connecting an external resistance in series with the
DRAIN pin and attached to the same heat sink, having a
resistance value that is equal to the difference between the
measured R
maximum specification.
DS(ON)
of the device under test and the worst case
DS(ON)
of TOP264-271, as specified in
TOP264-271
DS
does not
Rev. C 11/10
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