NCP5393MNR2G ON Semiconductor, NCP5393MNR2G Datasheet - Page 14

• Manufacturer Part Number: NCP5393MNR2G
• Description: IC CTLR 2/3/4PHASE CPU 48-QFN
• Manufacturer: ON Semiconductor

Specifications of NCP5393MNR2G

• Applications: Multiphase Controller
• Current - Supply: 25mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN Exposed Pad
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

oscillator, the VDDNB oscillator will free-run at a
frequency which is nominally 1.25 ratio of f
CPU Support
and configure itself to PVI or SVI mode. When in PVI mode,
to address the CORE section the NCP5393 uses VID[5:0].
When in SVI mode NCP5393 uses VID2 and VID3 alone for
SVC and SVD information respectively.
PVI - Parallel Interface
Section reference. NB is kept in HiZ mode. Parallel mode
operation is depicted in Figure 9. Voltage identifications for
the 6bit AMD mode is given in Table 2.
•
•
•
DC IN
VDDIO
ENABLE
VID[5]
PVIEN/
VID[1]
VID[0]
VDD ONLY
[NDDNB N/A]
PWRGOOD
PWROK IS N/A
NCP5393 is able to detect the CPU it is going to supply
PVI is a 6-bit wide parallel interface to address the CORE
Sequencing of events for PVI:
Boot VID (refer to Table 1) is captured from SVC and
SVD pins on rising edge of ENABLE.
This capture is INDEPENDENT of any other signal.
PVI is determined by sampling VID[1] during rising
edge of ENABLE (PVI: VID[1]=1)
Output Rises to BOOT
VID at SS Rate
VR Turn-On
Command
BOOT VID MSB
VID[1] High at Rise of Enable Selects PVI Operation
BOOT VID LSB
Figure 9. Power Up Sequences in Parallel Mode Operation
Soft-Start is
Complete
VDD
.
http://onsemi.com
Further VDD Transition(s)
at Regular Slew Rate
NCP5393
14
•
•
•
•
Table 1. Metal VID/BOOT VID
Once PVI is determined, the VID controller is enabled
and increments to the Boot VID at the Soft Start rate
Once the VID controller is enabled, the VID controller
can receive PVI VIDs, independent of PWROK which
is ignored in PVI mode
If a PVI VID is sent prior to the VID controller
reaching the Boot VID, the VID controller will move to
the PVI VID
If a new code is detected during the transition, the
device updates the Target-VID level and performs the
on-the-fly Transition up to the new code.
SVC
0
0
1
1
De-Assertion
PWRGOOD
Faults Only
Occurs on
SVD
0
1
0
1
VR Turn-Off
Pre-PWROK Metal VID
VR Turn-Off Command
Forces PWRGOOD Low
Command
Output Voltage
1.1 V
1.0 V
0.9 V
0.8 V