ADC12130CIWM National Semiconductor, ADC12130CIWM Datasheet - Page 27

• Manufacturer Part Number: ADC12130CIWM
• Description: IC, ADC, 12BIT, 114KSPS, SOIC-16
• Manufacturer: National Semiconductor

Specifications of ADC12130CIWM

• Resolution (bits): 12bit
• Sampling Rate: 114kSPS
• Input Channel Type: Differential, Single Ended
• Data Interface: Serial, SPI
• Supply Voltage Range - Analog: 3V To 5.5V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ADC12138
ADC12130
ADC12132
Status Bit
Status Bit
Location
Function
Note: The ADC powers up with no Auto Cal, no Auto Zero, 10 CCLK acquisition time, 12-bit + sign conversion, power up, 12- or 13-bit MSB First, and user mode.
X = Don't Care
X = Don't Care
and
CS
H
X
L
L
See Table 2 or Table 3
See Table 2 or Table 3
See Table 2 or Table 3
See Table 2 or Table 3
“High”
indicates a
Power Up
Sequence
is in
progress
DI0
DI0
H
H
H
H
L
L
L
L
L
L
L
L
L
DB0
PU
DI1
DI1
H
H
X
L
L
L
L
L
L
L
L
L
L
Device Status
DI2
“High”
indicates a
Power
Down
Sequence
is in
progress
X
L
L
L
L
L
L
L
L
L
L
L
L
CONV
DB1
PD
H
X
X
L
DI3
X
L
L
L
L
L
L
L
L
L
L
L
L
TABLE 5. Conversion/Read Data Only Mode Programming
DI4
DI2
“High”
indicates
an Auto Cal
Sequence
is in
progress
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
DB2
Cal
DI5
DI3
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
TABLE 4. Mode Programming
PD
DI6
DI4
H
L
L
L
TABLE 6. Status Register
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
Not used
DB3
DI7
DI5
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
27
(CH1–CH7 become Active Outputs)
“High”
indicates a
12 or 13 bit
format
Acquisition Time—10 CCLK Cycles
Acquisition Time—18 CCLK Cycles
Acquisition Time—34 CCLK Cycles
Acquisition Time—6 CCLK Cycles
12 or 13
DB4
Read Only (Previous DO Format). No Conversion.
Data Out without Sign
Read Status Register
Data Out with Sign
12 Bit Conversion
12 Bit Conversion
12 Bit Conversion
12 Bit Conversion
Mode Selected
Power Down
User Mode
Test Mode
“High”
indicates a
16 or 17 bit
format
Auto Zero
Power Up
(Current)
DO Output Format Status
Auto Cal
16 or 17
DB5
See Table 4 for Mode
Power Down
“High”
indicates
that the
sign bit is
included.
When
“Low” the
sign bit is
not
included.
Mode
Idle
Sign
DB6
When “High”
the conversion
result will be
output MSB
first. When
“Low” the
result will be
output LSB
first.
Justification Test Mode
12 or 13 Bit MSB First
16 or 17 Bit MSB First
12 or 13 Bit LSB First
16 or 17 Bit LSB First
(next Conversion
DB7
DO Format
No Change
No Change
No Change
No Change
No Change
No Change
No Change
No Change
No Change
No Change
No Change
No Change
No Change
Cycle)
www.national.com
When
“High” the
device is in
test mode.
When
“Low” the
device is in
user mode.
DB8