LFXP6C-5TN144C LATTICE SEMICONDUCTOR, LFXP6C-5TN144C Datasheet - Page 63

• Manufacturer Part Number: LFXP6C-5TN144C
• Description: FPGA, 1.8V FLASH, INSTANT ON, SMD
• Manufacturer: LATTICE SEMICONDUCTOR
• Series: LatticeXPr

Specifications of LFXP6C-5TN144C

• No. Of Logic Blocks: 720
• No. Of Macrocells: 3000
• Family Type: LatticeXP
• No. Of Speed Grades: 5
• No. Of I/o's: 100
• Clock Management: PLL
• Core Supply Voltage Range: 1.71V To 3.465V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Pin Information Summary
Single Ended User I/O
Differential Pair User I/O
Configuration
TAP
Dedicated (total without supplies)
V
V
V
V
GND
GND
NC
Single Ended/Differential
I/O per Bank
V
1. During configuration the user-programmable I/Os are tri-stated with an internal pull-up resistor enabled. If any pin is not used (or not
2. The differential I/O per bank includes both dedicated LVDS and emulated LVDS pin pairs. Please see the Logic Signal Connections table
CC
CCAUX
CCPLL
CCIO
CCJ
bonded to a package pin), it is also tri-stated with an internal pull-up resistor enabled after configuration.
for more information.
PLL
2
Pin Type
2
Dedicated
Muxed
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
1
100 TQFP 144 TQFP 208 PQFP 144 TQFP 208 PQFP 256 fpBGA
12/4
10/4
8/2
9/0
8/3
6/2
5/2
4/2
62
19
11
14
10
5
6
2
2
2
1
1
1
1
1
1
1
1
2
0
1
4-4
12/4
12/5
XP3
12/3
12/2
12/5
13/5
14/6
13/5
100
35
11
14
13
5
6
4
2
2
1
1
1
1
2
1
1
1
2
0
1
20/8
18/6
14/6
14/6
21/9
21/9
14/6
14/6
136
56
11
14
24
5
6
8
2
2
2
2
2
2
2
2
2
2
2
6
1
LatticeXP Family Data Sheet
12/3
12/2
12/5
13/5
14/6
12/4
13/5
12/5
100
35
11
14
13
5
6
4
2
2
1
1
1
1
2
1
1
1
2
0
1
Pinout Information
20/8
18/6
17/7
14/6
21/9
21/9
17/7
14/6
XP6
142
58
11
14
24
5
6
8
2
2
2
2
2
2
2
2
2
2
2
0
1
26/11
26/11
26/11
26/11
21/9
21/9
21/9
21/9
188
80
11
14
24
5
6
8
4
2
2
2
2
2
2
2
2
2
2
0
1