LFE2M20E-5FN256C LATTICE SEMICONDUCTOR, LFE2M20E-5FN256C Datasheet - Page 112

• Manufacturer Part Number: LFE2M20E-5FN256C
• Description: IC, LATTICEECP2M FPGA, 420MHZ, FPBGA-256
• Manufacturer: LATTICE SEMICONDUCTOR
• Series: LatticeECP2Mr

Specifications of LFE2M20E-5FN256C

• No. Of Logic Blocks: 19000
• No. Of Macrocells: 10500
• No. Of Speed Grades: 5
• No. Of I/o's: 140
• Clock Management: DLL, PLL
• I/o Supply Voltage: 3.465V
• Total Ram Bits: 1217Kbit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LatticeECP2M Pin Information Summary, LFE2M20 and LFE2M35 (Cont.)
Lattice Semiconductor
Available DDR-Interfaces per
I/O Bank
PCI Capable I/Os per Bank
1. Minimum requirement to implement a fully functional 8-bit wide DDR bus. Available DDR interface consists of at least 12 I/Os (1 DQS + 1
DQSB + 8 DQs + 1 DM + Bank VREF1).
1
Pin Type
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
Bank8
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
Bank8
256 fpBGA 484 fpBGA 256 fpBGA 484 fpBGA 672 fpBGA
4-12
32
20
16
28
0
0
0
0
2
1
0
1
0
0
0
0
0
0
LFE2M20
62
28
40
40
0
0
1
1
4
2
3
2
0
0
0
0
0
0
LatticeECP2/M Family Data Sheet
32
20
16
28
0
0
0
0
2
1
0
1
0
0
0
0
0
0
Pinout Information
LFE2M35
62
28
39
40
0
0
1
1
4
2
1
2
0
0
0
0
0
0
50
60
52
60
0
0
3
2
3
3
2
3
0
0
0
0
0
0