IDT7133SA35JG INTEGRATED DEVICE TECHNOLOGY, IDT7133SA35JG Datasheet

SRAM DUAL PORT 2KX16, 7133, PLCC68

IDT7133SA35JG

Manufacturer Part Number
IDT7133SA35JG
Description
SRAM DUAL PORT 2KX16, 7133, PLCC68
Manufacturer
INTEGRATED DEVICE TECHNOLOGY
Datasheet

Specifications of IDT7133SA35JG

Memory Size
32Kbit
Access Time
35ns
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
PLCC
No. Of Pins
68
Operating Temperature Range
0°C To +70°C
Operating Temperature Max
70°C
Operating
RoHS Compliant
Memory Configuration
2K X 16
Rohs Compliant
Yes
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Features
Functional Block Diagram
NOTE:
1. IDT7133 (MASTER): BUSY is open drain output and requires pull-up resistor.
©2006 Integrated Device Technology, Inc.
High-speed access
Low-power operation
Versatile control for write: separate write control for lower
and upper byte of each port
MASTER IDT7133 easily expands data bus width to 32 bits
or more using SLAVE IDT7143
On-chip port arbitration logic (IDT7133 only)
IDT7143 (SLAVE): BUSY is input.
Military: 25/35/45/55/70/90ns (max.)
Industrial: 25/35/55ns (max.)
Commercial: 20/25/35/45/55/70/90ns (max.)
IDT7133/43SA
Active: 1150mW (typ.)
Standby: 5mW (typ.)
IDT7133/43LA
Active: 1050mW (typ.)
Standby: 1mW (typ.)
I/O
BUSY
R/W
R/W
I/O
8L
0L
CE
LUB
LLB
- I/O
- I/O
L
L
(1)
A
OE
A
10L
15L
0L
7L
L
CE
L
ADDRESS
DECODER
11
HIGH SPEED
2K X 16 DUAL-PORT
SRAM
CONTROL
I/O
(IDT7133 ONLY)
ARBITRATION
MEMORY
ARRAY
LOGIC
1
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Description
The IDT7133 is designed to be used as a stand-alone 16-bit Dual-Port
pin TQFP
for selected speeds
The IDT7133/7143 are high-speed 2K x 16 Dual-Port Static RAMs.
BUSY output flag on IDT7133; BUSY input on IDT7143
Fully asynchronous operation from either port
Battery backup operation–2V data retention
TTL-compatible; single 5V (±10%) power supply
Available in 68-pin ceramic PGA, Flatpack, PLCC and 100-
Military product compliant to MIL-PRF-38535 QML
Industrial temperature range (–40°C to +85°C) is available
Green parts available, see ordering information
CONTROL
I/O
11
DECODER
ADDRESS
CE
R
IDT7133SA/LA
IDT7143SA/LA
JANUARY 2006
OE
I/O
A
I/O
A
10R
0R
0R
R
8R
2746 drw 01
R/W
R/W
CE
BUSY
- I/O
- I/O
R
RUB
RLB
7R
15R
R
(1)
DSC 2746/12

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IDT7133SA35JG Summary of contents

Page 1

... CE L NOTE: 1. IDT7133 (MASTER): BUSY is open drain output and requires pull-up resistor. IDT7143 (SLAVE): BUSY is input. ©2006 Integrated Device Technology, Inc. HIGH SPEED DUAL-PORT SRAM ◆ ◆ ◆ ◆ ◆ BUSY output flag on IDT7133; BUSY input on IDT7143 ◆ ◆ ◆ ◆ ◆ ...

Page 2

IDT7133SA/LA, IDT7143SA/LA High-Speed Dual-Port RAM RAM “MASTER” Dual-Port RAM together with the IDT7143 “SLAVE” Dual-Port in 32-bit-or-more word width systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32-bit-or-wider memory system applications results in ...

Page 3

IDT7133SA/LA, IDT7143SA/LA High-Speed Dual-Port RAM Pin Configurations (1,2, 10L R/W LLB ...

Page 4

IDT7133SA/LA, IDT7143SA/LA High-Speed Dual-Port RAM Absolute Maximum Ratings Symbol Rating Commercial & Industrial (2) V Terminal Voltage -0.5 to +7.0 TERM with Respect to GND Temperature -55 to +125 T BIAS Under Bias T Storage -65 to ...

Page 5

IDT7133SA/LA, IDT7143SA/LA High-Speed Dual-Port RAM DC Electrical Characteristics Operating Temperature and Supply Voltage Range Symbol Parameter Dynamic Operating , Outputs Disabled CC IL Current (3) (Both Ports Active MAX CE ...

Page 6

IDT7133SA/LA, IDT7143SA/LA High-Speed Dual-Port RAM Data Retention Characteristics (LA Version Only 0.2V Symbol Parameter V V for Data Retention Data Retention Current CCDR (3) t Chip Deselect to Data Retention ...

Page 7

IDT7133SA/LA, IDT7143SA/LA High-Speed Dual-Port RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Symbol Parameter READ CYCLE t Read Cycle Time RC t Address Access Time AA t Chip Enable Access Time ACE t Output ...

Page 8

IDT7133SA/LA, IDT7143SA/LA High-Speed Dual-Port RAM TIMING WAVEFORM OF READ CYCLE NO. 1, EITHER SIDE ADDRESS DATA PREVIOUS DATA VALID OUT BUSY OUT TIMING WAVEFORM OF READ CYCLE NO. 2, EITHER SIDE CE OE DATA OUT t I ...

Page 9

IDT7133SA/LA, IDT7143SA/LA High-Speed Dual-Port RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Symbol Parameter WRITE CYCLE (3) t Write Cycle Time WC t Chip Enable to End-of-Write EW t Address Valid to End-of-Write AW ...

Page 10

IDT7133SA/LA, IDT7143SA/LA High-Speed Dual-Port RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Symbol BUSY TIMING (For MASTER 71V33) BUSY Access Time from Address t BAA BUSY Disable Time from Address t BDA BUSY Access ...

Page 11

IDT7133SA/LA, IDT7143SA/LA High-Speed Dual-Port RAM Timing Waveform of Write Cycle No. 1 (R/W Controlled Timing) ADDRESS ( (9) R DATA OUT DATA IN Write Cycle No. 2 (CE Controlled Timing) ADDRESS ...

Page 12

IDT7133SA/LA, IDT7143SA/LA High-Speed Dual-Port RAM Timing Waveform of Write with Port-to-Port Read and BUSY ADDR "A" R/W "A" DATA IN"A" (1) t APS ADDR "B" BUSY "B" DATA OUT "B" NOTES ensure that the earlier ...

Page 13

IDT7133SA/LA, IDT7143SA/LA High-Speed Dual-Port RAM Timing Waveform of BUSY Arbitration Controlled by CE Timing ADDR "A" AND "B" CE "A" t (2) APS CE "B" BUSY "B" Timing Waveform of BUSY Arbitration Controlled by Addresses t ADDR ...

Page 14

IDT7133SA/LA, IDT7143SA/LA High-Speed Dual-Port RAM Functional Description The IDT7133/43 provides two ports with separate control, address and I/O pins that permit independent access for reads or writes to any location in memory. The IDT7133/43 has an automatic ...

Page 15

IDT7133SA/LA, IDT7143SA/LA High-Speed Dual-Port RAM Truth Table I – Non-Contention Read/Write Control LEFT OR RIGHT PORT CE OE R/W R ...

Page 16

... Added green availability to features Page 16 Added green indicator for ordering information CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 The IDT logo is a registered trademark of Integrated Device Technology, Inc. Military, Industrial and Commercial Temperature Ranges X X Process/ Temperature Range Commercial (0° ...

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