PIC24FJ256GB106-I/MR Microchip Technology, PIC24FJ256GB106-I/MR Datasheet - Page 169

• Manufacturer Part Number: PIC24FJ256GB106-I/MR
• Description: IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256GB106-I/MR

• Controller Family/series: PIC24
• No. Of I/o's: 51
• Ram Memory Size: 16KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Core Size: 16 Bit
• Program Memory Size: 256KB
• Peripherals: ADC, Comparator, PWM, RTC, Timer
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART, USB OTG
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

13.0
Devices in the PIC24FJ256GB110 family all feature
9 independent input capture modules. Each of the
modules offers a wide range of configuration and
operating options for capturing external pulse events
and generating interrupts.
Key features of the input capture module include:
• Hardware-configurable for 32-bit operation in all
• Synchronous and Trigger modes of output
• A 4-level FIFO buffer for capturing and holding
• Configurable interrupt generation
• Up to 6 clock sources available for each module,
The module is controlled through two registers,
ICxCON1
(Register 13-2). A general block diagram of the module
is shown in Figure 13-1.
FIGURE 13-1:
 2009 Microchip Technology Inc.
Trigger and
Sync Sources
Note:
modes by cascading two adjacent modules
compare operation, with up to 30 user-selectable
trigger/sync sources available
timer values for several events
driving a separate internal 16-bit counter
IC Clock
Sources
Note 1: The ICx inputs must be assigned to an available RPn pin before use. Please see Section 10.4 “Peripheral
ICx Pin
INPUT CAPTURE WITH
DEDICATED TIMERS
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
Section
Dedicated Timer” (DS39722).
(1)
(Register 13-1)
Pin Select” for more information.
ICTSEL<2:0>
Trigger and
Sync Logic
Prescaler
Counter
1:1/4/16
Family
34.
INPUT CAPTURE BLOCK DIAGRAM
Select
Clock
“Input
Reference
Increment
Reset
and
Capture
ICM<2:0>
SYNCSEL<4:0>
TRIGGER
Clock Synchronizer
Edge Detect Logic
ICxCON2
Manual”,
PIC24FJ256GB110 FAMILY
ICxTMR
and
with
13.1
13.1.1
By default, the input capture module operates in a
free-running mode. The internal 16-bit counter,
ICxTMR, counts up continuously, wrapping around
from FFFFh to 0000h on each overflow, with its period
synchronized to the selected external clock source.
When a capture event occurs, the current 16-bit value
of the internal counter is written to the FIFO buffer.
In Synchronous mode, the module begins capturing
events on the ICx pin as soon as its selected clock
source is enabled. Whenever an event occurs on the
selected sync source, the internal counter is reset. In
Trigger mode, the module waits for a Sync event from
another internal module to occur before allowing the
internal counter to run.
Standard, free-running operation is selected by setting
the SYNCSEL bits to ‘00000’, and clearing the ICTRIG
bit (ICxCON2<7>). Synchronous and Trigger modes
are selected any time the SYNCSEL bits are set to any
value except ‘00000’. The ICTRIG bit selects either
Synchronous or Trigger mode; setting the bit selects
Trigger mode operation. In both modes, the SYNCSEL
bits determine the sync/trigger source.
When the SYNCSEL bits are set to ‘00000’ and
ICTRIG is set, the module operates in Software Trigger
mode. In this case, capture operations are started by
manually setting the TRIGSTAT bit (ICxCON2<6>).
16
General Operating Modes
SYNCHRONOUS AND TRIGGER
MODES
4-Level FIFO Buffer
ICOV, ICBNE
Event and
ICI<1:0>
Interrupt
ICxBUF
Logic
Set ICxIF
DS39897C-page 169
16
16
System Bus