ADC78H89CIMT National Semiconductor, ADC78H89CIMT Datasheet - Page 5

• Manufacturer Part Number: ADC78H89CIMT
• Description: IC, 12BIT ADC 500KSPS, POWERWISE
• Manufacturer: National Semiconductor

Specifications of ADC78H89CIMT

• Resolution (bits): 12bit
• Input Channel Type: Single Ended
• Data Interface: Serial, SPI
• Supply Voltage Range - Analogue: 2.7V To 5.25V
• Supply Voltage Range - Digital: -0.3V To 5.25V, 2.7V To 5.25V
• Sampling Rate: 500kSPS
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Symbol
ADC78H89 Timing Specifications
The following specifications apply for AV
T
Note 1: Absolute maximum ratings are limiting values which indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions
for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical
Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not
operated under the listed test conditions.
Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supplies (that is, V
The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to five.
Note 4: The absolute maximum junction temperature (T
junction-to-ambient thermal resistance (θ
for maximum power dissipation listed above will be reached only when the ADC78H89 is operated in a severe fault condition (e.g. when input or output pins are
driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is 220 pF discharged through ZERO ohms.
Note 6: See AN450, “Surface Mounting Methods and Their Effect on Product Reliability”, or the section entitled “Surface Mount” found in any post 1986 National
Semiconductor Linear Data Book, for other methods of soldering surface mount devices.
Note 7: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: Data sheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 9: Except power supply pins.
Note 10: Clock may be in any state (high or low) when CS is asserted, with the restrictions on setup and hold time given by t
A
t
t
t
t
t
t
t
t
t
1a
1b
2
3
4
5
6
7
8
= T
MIN
SCLK High to CS Fall Setup Time
SCLK Low to CS Fall Hold Time
Delay from CS Until DOUT
TRI-STATE
Data Access Time after SCLK
Falling Edge
Data Setup Time Prior to SCLK
Rising Edge
Data Valid SCLK Hold Time
SCLK High Pulse Width
SCLK Low Pulse Width
CS Rising Edge to DOUT
High-Impedance
to T
MAX
: all other limits T
®
Parameter
Disabled
JA
), and the ambient temperature (T
A
= 25˚C.
DD
= DV
J
max) for this device is 150˚C. The maximum allowable power dissipation is dictated by T
(Note 10)
(Note 10)
DD
= +2.7V to 5.25V, f
A
), and can be calculated using the formula P
Conditions
5
IN
<
AGND or V
SCLK
IN
= 8 MHz, C
>
V
A
or V
D
), the current at that pin should be limited to 10 mA.
L
Typical
= 50 pF, Boldface limits apply for
D
MAX = (T
1a
and t
Limits
t
t
0.4 x
0.4 x
SCLK
SCLK
10
10
30
30
10
10
20
J
1b
max − T
.
A
)/θ
JA
www.national.com
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (min)
ns (min)
ns (min)
ns (min)
. The values
Units
J
max, the