DSPIC30F4011-20E/ML Microchip Technology, DSPIC30F4011-20E/ML Datasheet - Page 91

• Manufacturer Part Number: DSPIC30F4011-20E/ML
• Description: IC,DSP,16-BIT,CMOS,LLCC,44PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4011-20E/ML

• Rohs Compliant: YES
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 48KB (16K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: DSPIC30F401120EML

14.0
This section describes the Quadrature Encoder Inter-
face (QEI) module and associated operational modes.
The QEI module provides the interface to incremental
encoders for obtaining mechanical position data.
FIGURE 14-1:
© 2010 Microchip Technology Inc.
Note:
Note: In dsPIC30F4011/4012, the UPDN pin is not available. Up/Down logic bit can still be polled by software.
INDX
QEA
QEB
QUADRATURE ENCODER
INTERFACE (QEI) MODULE
Synchronize
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
dsPIC30F Family Reference Manual
(DS70046). For more information on the
device instruction set and programming,
refer to the “16-bit MCU and DSC
Reference Manual” (DS70157).
Sleep Input
Det
UPDN_SRC
QUADRATURE ENCODER INTERFACE BLOCK DIAGRAM
Programmable
Programmable
Programmable
0
1
Digital Filter
Digital Filter
Digital Filter
QEICON<11>
3
Up/Down
T
QEIM<2:0>
CY
Interface Logic
TQCS
Quadrature
Encoder
0
1
QEIM<2:0>
Mode Select
3
TQGATE
1
0
2
The operational features of the QEI include:
• Three input channels for two phase signals and
• 16-bit up/down position counter
• Count direction status
• Position Measurement (x2 and x4) mode
• Programmable digital noise filters on inputs
• Alternate 16-bit Timer/Counter mode
• Quadrature Encoder Interface interrupts
These operating modes are determined by setting the
appropriate
Figure 14-1
block diagram.
index pulse
dsPIC30F4011/4012
16-bit Up/Down Counter
Max Count Register
D
CK
Comparator/
Zero Detect
(MAXCNT)
(POSCNT)
TQCKPS<1:0>
Q
Q
depicts the Quadrature Encoder Interface
1, 8, 64, 256
Prescaler
bits
2
QEIM<2:0>
Reset
Equal
(QEICON<10:8>).
DS70135G-page 91
QEIIF
Event
Flag