DSPIC30F4012-20E/ML Microchip Technology, DSPIC30F4012-20E/ML Datasheet

IC,DSP,16-BIT,CMOS,LLCC,44PIN,PLASTIC

DSPIC30F4012-20E/ML

Manufacturer Part Number
DSPIC30F4012-20E/ML
Description
IC,DSP,16-BIT,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F4012-20E/ML

Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Package
44QFN EP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
20
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
6-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
XLT44QFN4 - SOCKET TRANS ICE 28DIP TO 44QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
DSPIC30F401220EML

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F4012-20E/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
The dsPIC30F4011/4012 (Rev. A4) samples that you
have received were found to conform to the
specifications and functionality described in the
following documents:
• DS70157 – “dsPIC30F/33F Programmer’s
• DS70141 – “dsPIC30F3010/3011 Data Sheet”
• DS70046 – “dsPIC30F Family Reference Manual”
The exceptions to the specifications in the documents
listed above are described in this section. These
exceptions are described for the specific devices listed
below:
• dsPIC30F4011
• dsPIC30F4012
These devices may be identified by the following
message that appears in the MPLAB
Window under MPLAB IDE, when a “Reset and
Connect” operation is performed within MPLAB IDE:
Setting Vdd source to target
Target Device dsPIC30F3011 found,
revision = Rev 0x1004
...Reading ICD Product ID
Running ICD Self Test
...Passed
MPLAB ICD 2 Ready
The errata described in this section will be addressed
in
dsPIC30F4012 devices.
© 2008 Microchip Technology Inc.
Reference Manual”
future
revisions
dsPIC30F4011/4012 Rev. A4 Silicon Errata
of
dsPIC30F4011
®
ICD 2 Output
dsPIC30F4011/4012
and
Silicon Errata Summary
The following list summarizes the errata described in
further detail throughout the remainder of this
document:
1.
2.
3.
4.
5.
6.
7.
8.
9.
MAC Class Instructions with ±4 Address
Modification
Sequential MAC instructions, which prefetch data
from Y data space using ±4 address modification,
will cause an address error trap.
Decimal Adjust Instruction
The Decimal Adjust instruction, DAW.b, may
improperly clear the Carry bit, C (SR<0>).
Special Function Registers
Writes to certain unimplemented address locations
can affect I/O Port register values.
PSV Operations Using SR
In certain instructions, fetching one of the
operands from program memory using Program
Space Visibility (PSV) will corrupt specific bits in
the STATUS Register, SR.
Early Termination of Nested DO loops
When using two DO loops in a nested fashion,
terminating the inner-level DO loop by setting the
EDT (CORCON<11>) bit will produce unexpected
results.
4x PLL Operation
The 4x PLL mode of operation may not function
correctly for certain input frequencies.
Sequential Interrupts
Sequential interrupts after modifying the CPU IPL,
interrupt IPL, interrupt enable or interrupt flag may
cause an address error trap.
DISI Instruction
The DISI instruction will not disable interrupts if a
DISI instruction is executed in the same
instruction
decrements to zero.
Output Compare Module in PWM Mode
Output compare will produce a glitch when
loading 0% duty cycle in PWM mode. It will also
miss the next compare after the glitch.
cycle
that
the
DS80398A-page 1
DISI
counter

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DSPIC30F4012-20E/ML Summary of contents

Page 1

... MPLAB ICD 2 Ready The errata described in this section will be addressed in future revisions of dsPIC30F4011 dsPIC30F4012 devices. © 2008 Microchip Technology Inc. dsPIC30F4011/4012 Silicon Errata Summary The following list summarizes the errata described in further detail throughout the remainder of this document: 1. MAC Class Instructions with ±4 Address ...

Page 2

... PSV Operations An address error trap occurs in certain addressing modes when accessing the first four bytes of any PSV page. The following sections describe the errata and work around to these errata, where they may apply. © 2008 Microchip Technology Inc. ® DSC ...

Page 3

... BRA L1 ;and exit L0:DAW.b w2 L1: .... © 2008 Microchip Technology Inc. dsPIC30F4011/4012 3. Module: Special Function Registers The I/O Port register values can be changed by writing to the following address locations, which are located in unimplemented memory space. A write to these unimplemented addresses could cause an I/O pin configured as an output to change states ...

Page 4

... Result in W4 (3) SR<1:0> bits , Result in W2 (3) SR<1:0> bits (4) SR<15:10> bits CORRECT RESULTS ;Load PSVPAG register ;Enable PSV ;Set up W1 for ;indirect PSV access ;from 0x000200 ;works ok ;Load W2 with data ;from program memory ;Carry flag and W4 ;results are ok! © 2008 Microchip Technology Inc. ...

Page 5

... Note: For details on the functionality of EDT bit, see section 2.9.2.4 in the dsPIC30F Family Reference Manual. © 2008 Microchip Technology Inc. dsPIC30F4011/4012 6. Module: 4x PLL Operation When the 4x PLL mode of operation is selected, the specified input frequency range of 4-10 MHz is not fully supported. ...

Page 6

... One may use a large DISI value and then set the DISICNT register to zero, as shown in Example 6. A macro may also be used to perform this task, as shown in Example 7. // protect CPU IPL modification // set CPU IPL remove DISI protection // safely modify the CPU IPL © 2008 Microchip Technology Inc. ...

Page 7

... If the application requires 0% duty cycles, the output compare module can be disabled for 0% duty cycles, and re-enabled for non-zero percent duty cycles. © 2008 Microchip Technology Inc. dsPIC30F4011/4012 10. Module: Output Compare A glitch will be produced on an output compare pin under the following conditions: • ...

Page 8

... A/D Channels Configuration REF REF CH X ANx S/H ADC REF REF ANx S/H ADC ANx REF REF REF ANx S/H ADC ANx REF © 2008 Microchip Technology Inc. ...

Page 9

... User's code } void __attribute__((__interrupt__)) _QEIInterrupt(void) { IFSxbits.QEIIF = 0; POSCNT_b15 ^= 0x8000; // Overflow or Underflow } © 2008 Microchip Technology Inc. dsPIC30F4011/4012 Work around To prevent this condition from occurring, set MAXCNT to 0x7FFF, which will cause an interrupt to be generated by the QEI module. In addition, a global variable could be used to keep ...

Page 10

... If the D_A flag and the I2COV flag are both set, a valid data byte was received and a previous valid data byte was lost. It will be necessary to code for handling this overflow condition. © 2008 Microchip Technology Inc slave interrupt 2 C nodes. ...

Page 11

... Work around None. © 2008 Microchip Technology Inc. dsPIC30F4011/4012 19. Module: I When the I I2CEN bit in the I2CCON register, the dsPIC DSC device generates a glitch on the SDA and SCL pins. This glitch falsely indicates “Communication Start” ...

Page 12

... For applications using the C language, MPLAB C30 version 3.11 or higher, provides the following command-line switch that implements a work around for the erratum. -merrata=psv_trap Refer to the readme.txt file in the MPLAB C30 v3.11 tool suite for further details. © 2008 Microchip Technology Inc. ...

Page 13

... APPENDIX A: REVISION HISTORY Revision A (9/2008) Initial version of this document. © 2008 Microchip Technology Inc. dsPIC30F4011/4012 DS80398A-page 13 ...

Page 14

... NOTES: DS80398A-page 14 © 2008 Microchip Technology Inc. ...

Page 15

... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 16

... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. 01/02/08 ...

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