DSPIC30F6013-20E/PF Microchip Technology, DSPIC30F6013-20E/PF Datasheet - Page 222

• Manufacturer Part Number: DSPIC30F6013-20E/PF
• Description: IC,DSP,16-BIT,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6013-20E/PF

• Rohs Compliant: YES
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 132KB (44K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1AC164314 - MODULE SKT FOR PM3 80PFAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F601320EPF

dsPIC30F6011A/6012A/6013A/6014A
O
OC/PWM Module Timing Characteristics.......................... 192
Operating Current (I
Oscillator
Oscillator Selection ........................................................... 145
Oscillator Start-up Timer
Output Compare Interrupts ................................................. 89
Output Compare Module..................................................... 87
Output Compare Operation During CPU Idle Mode............ 89
Output Compare Sleep Mode Operation............................. 89
P
Packaging Information ...................................................... 211
Peripheral Module Disable (PMD) Registers .................... 158
PICSTART Plus Development Programmer ..................... 172
Pinout Descriptions ............................................................. 12
PLL Clock Timing Specifications....................................... 184
POR. See Power-on Reset.
PORTA
PORTB
PORTC
PORTD
PORTF
PORTG
Power Saving Modes ........................................................ 156
Power-Down Current (I
Power-up Timer
DS70143C-page 220
Configurations ........................................................... 148
Operating Modes (Table) .......................................... 146
System Overview ...................................................... 145
Timing Characteristics .............................................. 187
Timing Requirements ................................................ 187
Register Map............................................................... 90
Timing Characteristics .............................................. 191
Timing Requirements ................................................ 191
Marking ..................................................................... 211
Register Map for dsPIC30F6013/6014 ....................... 65
Register Map for dsPIC30F6011/6012/6013/6014 ..... 65
Register Map for dsPIC30F6011/6012 ....................... 65
Register Map for dsPIC30F6013/6014 ....................... 65
Register Map for dsPIC30F6011/6012 ....................... 66
Register Map for dsPIC30F6013/6014 ....................... 66
Register Map for dsPIC30F6011/6012 ....................... 66
Register Map for dsPIC30F6013/6014 ....................... 66
Register Map for dsPIC30F6011/6012/6013/6014 ..... 66
Idle ............................................................................ 157
Sleep ......................................................................... 156
Sleep and Idle ........................................................... 145
Timing Characteristics .............................................. 187
Timing Requirements ................................................ 187
Fail-Safe Clock Monitor..................................... 149
Fast RC (FRC) .................................................. 149
Initial Clock Source Selection ........................... 148
Low Power RC (LPRC) ..................................... 149
LP Oscillator Control ......................................... 148
Phase Locked Loop (PLL) ................................ 149
Start-up Timer (OST) ........................................ 148
DD
)..................................................... 175
PD
) ................................................ 177
Program Address Space..................................................... 25
Program and EEPROM Characteristics............................ 181
Program Counter ................................................................ 16
Programmable .................................................................. 145
Programmer’s Model .......................................................... 16
Programming Operations.................................................... 53
Protection Against Accidental Writes to OSCCON ........... 150
R
Reader Response............................................................. 224
Reset ........................................................................ 145, 151
Reset Sequence ................................................................. 47
Reset Sources
Reset Timing Characteristics............................................ 187
Reset Timing Requirements ............................................. 187
RTSP Operation ................................................................. 52
Run-Time Self-Programming (RTSP) ................................. 51
Construction ............................................................... 27
Data Access from Program Memory
Data Access from Program Memory Using
Data Access from, Address Generation ..................... 27
Data Space Window into Operation............................ 30
Data Table Access (LS Word) .................................... 28
Data Table Access (MS Byte)..................................... 29
Memory Map for dsPIC30F6011/6013........................ 26
Memory Map for dsPIC30F6012/6014........................ 26
Table Instructions
Diagram ...................................................................... 17
Algorithm for Program Flash....................................... 53
Erasing a Row of Program Memory............................ 53
Initiating the Programming Sequence......................... 54
Loading Write Latches ................................................ 54
BOR, Programmable ................................................ 153
Brown-out Reset (BOR)............................................ 145
Oscillator Start-up Timer (OST) ................................ 145
POR
POR (Power-on Reset)............................................. 151
Power-on Reset (POR)............................................. 145
Power-up Timer (PWRT) .......................................... 145
Reset Sources ............................................................ 47
Brown-out Reset (BOR).............................................. 47
Illegal Instruction Trap ................................................ 47
Trap Lockout............................................................... 47
Uninitialized W Register Trap ..................................... 47
Watchdog Time-out .................................................... 47
Using Program Space Visibility .......................... 29
Table Instructions ............................................... 28
TBLRDH ............................................................. 28
TBLRDL.............................................................. 28
TBLWTH............................................................. 28
TBLWTL ............................................................. 28
Operating without FSCM and PWRT................ 153
With Long Crystal Start-up Time ...................... 153
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