LM87CIMTX National Semiconductor, LM87CIMTX Datasheet - Page 24

• Manufacturer Part Number: LM87CIMTX
• Description: IC,Data Acquisition System,8-CHANNEL,8-BIT,TSSOP,24PIN,PLASTIC
• Manufacturer: National Semiconductor

Specifications of LM87CIMTX

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

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7-0
Internal Temp. Hardware
High Limit
External Temp. Hardware
High Limit
Test Register
Channel Mode Register
Internal Temp. Hardware
High Limit
External Temp. Hardware
High Limit
Value RAM
Company ID
Revision
Configuration Register 1
Interrupt Status Register 1
Interrupt Status Register 2
Interrupt Mask Register 1
Interrupt Mask Register 2
CI Clear Register
VID0-3/Fan Divisor
Register
VID4 Register
Configuration Register 2
Interrupt Status Register 1
Mirror
Interrupt Status Register 2
Mirror
SMBALERT# Enable
Bit
Functional Description
13.0 REGISTERS AND RAM
13.1 Address Pointer Register
The main register is the Address Pointer Register. The bit
designations are as follows:
13.2 Address Pointer Index (A7–A0)
Bit 7
Registers and RAM
A7
Address Pointer
Name
Bit 6
A6
Read/Write
Write
13h
14h
15h
16h
17h
18h
19h–3Dh
3Eh
3Fh
40h
41h
42h
43h
44h
46h
47h
49h
4Ah
4Ch
4Dh
80h
A6–A0 in
Bit 5
Hex
A5
Address of RAM and Registers. See the tables below for detail.
(Continued)
Address Pointer (Power On default 00h)
0100 0110
0101 0101
0000 0000
0000 0000
0100 0110
0101 0101
0000 0010
0000 0110
0000 1000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0010 0000
<
<
<
<
7:4
3:0
7:1
0
>
Bit 4
>
>
>
=VID4
A4
Power On Value of
<
= 0101;
= VID3–VID0
=1000 000;
7:0
Registers:
>
24
in Binary
Bit 3
A3
Description
70 ˚C Default -
adjustable. Lockable by setting bit 1 of
register 4Ah.
85 ˚C Default -
adjustable. Lockable by setting bit 2 of
register 4Ah.
Always set to 00h
70 ˚C Default -
adjustable
85 ˚C Default -
adjustable
See Section 13.18 for details. Address 19h
default=1111 1111
This designates the National Semiconductor
LM87.
Revisions of this device will start with 1 and
increment by one.
Bit 2
A2
<
<
<
<
7:0
7:0
7:0
7:0
Notes
Bit 1
>
>
>
>
A1
=0100 0110 - User
=0101 0101 - User
=0100 0110 - User
=0101 0101 - User
Bit 0
A0