LP2951ACMM National Semiconductor, LP2951ACMM Datasheet - Page 15

• Manufacturer Part Number: LP2951ACMM
• Description: LDO VOLTAGE REGULATOR IC
• Manufacturer: National Semiconductor

Specifications of LP2951ACMM

• Dropout Voltage Vdo: 380mV
• No. Of Pins: 8
• Output Current: 0.1A
• Mounting Type: Surface Mount
• Voltage Regulator Type: LDO Linear
• Peak Reflow Compatible (260 C): No
• Output Voltage: 5V
• Output Voltage Max: 29V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Application Hints
EXTERNAL CAPACITORS
A 1.0µF (or greater) capacitor is required between the output
and ground for stability at output voltages of 5V or more. At
lower output voltages, more capacitance is required (2.2µF
or more is recommended for 3V and 3.3V versions). Without
this capacitor the part will oscillate. Most types of tantalum or
aluminum electrolytics work fine here; even film types work
but are not recommended for reasons of cost. Many alumi-
num electrolytics have electrolytes that freeze at about
−30˚C, so solid tantalums are recommended for operation
below −25˚C. The important parameters of the capacitor are
an ESR of about 5Ω or less and a resonant frequency above
500kHz. The value of this capacitor may be increased with-
out limit.
Ceramic capacitors whose value is greater than 1000pF
should not be connected directly from the LP2951 output to
ground. Ceramic capacitors typically have ESR values in the
range of 5 to 10mΩ, a value below the lower limit for stable
operation (see curve Output Capacitor ESR Range).
The reason for the lower ESR limit is that the loop compen-
sation of the part relies on the ESR of the output capacitor to
provide the zero that gives added phase lead. The ESR of
ceramic capacitors is so low that this phase lead does not
occur, significantly reducing phase margin. A ceramic output
capacitor can be used if a series resistance is added (rec-
ommended value of resistance about 0.1Ω to 2Ω).
At lower values of output current, less output capacitance is
required for stability. The capacitor can be reduced to 0.33µF
for currents below 10mA or 0.1µF for currents below 1mA.
Using the adjustable versions at voltages below 5V runs the
error amplifier at lower gains so that more output capaci-
tance is needed. For the worst-case situation of a 100mA
load at 1.23V output (Output shorted to Feedback) a 3.3µF
(or greater) capacitor should be used.
Unlike many other regulators, the LP2950 will remain stable
and in regulation with no load in addition to the internal
voltage divider. This is especially important in CMOS RAM
keep-alive applications. When setting the output voltage of
the LP2951 versions with external resistors, a minimum load
of 1µA is recommended.
A 1µF tantalum, ceramic or aluminum electrolytic capacitor
should be placed from the LP2950/LP2951 input to ground if
there is more than 10 inches of wire between the input and
the AC filter capacitor or if a battery is used as the input.
Stray capacitance to the LP2951 Feedback terminal can
cause instability. This may especially be a problem when
using high value external resistors to set the output voltage.
Adding a 100pF capacitor between Output and Feedback
and increasing the output capacitor to at least 3.3µF will fix
this problem.
ERROR DETECTION COMPARATOR OUTPUT
The comparator produces a logic low output whenever the
LP2951 output falls out of regulation by more than approxi-
mately 5%. This figure is the comparator’s built-in offset of
about 60mV divided by the 1.235 reference voltage. (Refer
to the block diagram in the front of the datasheet.) This trip
level remains “5% below normal” regardless of the pro-
grammed output voltage of the 2951. For example, the error
flag trip level is typically 4.75V for a 5V output or 11.4V for a
12V output. The out of regulation condition may be due
either to low input voltage, current limiting, or thermal limit-
ing.
15
Figure 1 below gives a timing diagram depicting the ERROR
signal and the regulated output voltage as the LP2951 input
is ramped up and down. For 5V versions, the ERROR signal
becomes valid (low) at about 1.3V input. It goes high at
about 5V input (the input voltage at which V
Since the LP2951’s dropout voltage is load-dependent (see
curve in typical performance characteristics), the input volt-
age trip point (about 5V) will vary with the load current. The
output voltage trip point (approx. 4.75V) does not vary with
load.
The error comparator has an open-collector output which
requires an external pullup resistor. This resistor may be
returned to the output or some other supply voltage depend-
ing on system requirements. In determining a value for this
resistor, note that while the output is rated to sink 400µA, this
sink current adds to battery drain in a low battery condition.
Suggested values range from 100k to 1 MΩ. The resistor is
not required if this output is unused.
*When V
error flag voltage rises to its pull-up voltage. Using V
voltage (see Figure 2), rather than an external 5V source, will keep the
error flag voltage under 1.2V (typ.) in this condition. The user may wish to
divide down the error flag voltage using equal-value resistors (10kΩ
suggested), to ensure a low-level logic signal during any fault condition,
while still allowing a valid high logic level during normal operation.
PROGRAMMING THE OUTPUT VOLTAGE (LP2951)
The LP2951 may be pin-strapped for the nominal fixed out-
put voltage using its internal voltage divider by tying the
output and sense pins together, and also tying the feedback
and V
for any output voltage between its 1.235V reference and its
30V maximum rating. As seen in Figure 2, an external pair of
resistors is required.
The complete equation for the output voltage is
where V
the feedback pin bias current, nominally −20nA. The mini-
mum recommended load current of 1µA forces an upper limit
of 1.2 MΩ on the value of R
no load (a condition often found in CMOS in standby). I
produce a 2% typical error in V
at room temperature by trimming R
choosing R
creasing the resistor program current to 12µA. Since the
LP2951 typically draws 60µA at no load with Pin 2 open-
circuited, this is a small price to pay.
TAP
IN
REF
≤ 1.3V, the error flag pin becomes a high impedance, and the
pins together. Alternatively, it may be programmed
2
FIGURE 1. ERROR Output Timing
is the nominal 1.235 reference voltage and I
= 100k reduces this error to 0.17% while in-
2
, if the regulator must work with
OUT
which may be eliminated
1
. For better accuracy,
OUT
as the pull-up
OUT
00854620
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= 4.75V).
FB
FB
will
is