PIC16F54T-I/SO Microchip Technology, PIC16F54T-I/SO Datasheet - Page 31

• Manufacturer Part Number: PIC16F54T-I/SO
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,18PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F54T-I/SO

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 12
• Program Memory Size: 768B (512 x 12)
• Program Memory Type: FLASH
• Ram Size: 25 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.0
As with any other register, the I/O registers can be writ-
ten and read under program control. However, read
instructions (e.g., MOVF PORTB, W) always read the I/O
pins independent of the pin’s Input/Output modes. On
Reset, all I/O ports are defined as input (inputs are at
high-impedance), since the I/O control registers
(TRISA, TRISB, TRISC, TRISD and TRISE) are all set.
6.1
PORTA is a 4-bit I/O register. Only the low order 4 bits
are used (PORTA<3:0>). The high order 4 bits
(PORTA<7:4>) are unimplemented and read as ‘0’s.
6.2
PORTB is an 8-bit I/O register (PORTB<7:0>).
6.3
PORTC is an 8-bit I/O register (PORTC<7:0>) for the
PIC16F57 and PIC16F59.
PORTC is a General Purpose Register for the
PIC16F54.
6.4
PORTD is an 8-bit I/O register (PORTD<7:0>) for the
PIC16F59.
PORTD is a General Purpose Register for the
PIC16F54 and PIC16F57.
6.5
PORTE is an 4-bit I/O register for the PIC16F59. Only
the high order 4 bits are used (PORTE<7:4>). The low
order 4 bits (PORTE<3:0>) are unimplemented and
read as ‘0’s.
PORTE is a General Purpose Register for the
PIC16F54 and PIC16F57.
© 2007 Microchip Technology Inc.
I/O PORTS
PORTA
PORTB
PORTC
PORTD
PORTE
6.6
The output driver control registers are loaded with the
contents of the W register by executing the TRIS f
instruction. A ‘1’ from a TRIS register bit puts the corre-
sponding output driver in a High-Impedance (Input)
mode. A ‘0’ puts the contents of the output data latch
on the selected pins, enabling the output buffer.
The TRIS registers are “write-only” and are set (output
drivers disabled) upon Reset.
6.7
The equivalent circuit for an I/O port pin is shown in
Figure 6-1. All ports may be used for both input and
output operation. For input operations, these ports are
non-latching. Any input must be present until read by
an input instruction (e.g., MOVF PORTB, W). The out-
puts are latched and remain unchanged until the output
latch is rewritten. To use a port pin as output, the
corresponding direction control bit (in TRISA, TRISB,
TRISC, TRISD and TRISE) must be cleared (= 0). For
use as an input, the corresponding TRIS bit must be
set. Any I/O pin can be programmed individually as
input or output.
FIGURE 6-1:
Note:
Data
Bus
WR
Port
W
Reg
TRIS ‘f’
TRIS Registers
I/O Interfacing
A read of the ports reads the pins, not the
output data latches. That is, if an output
driver on a pin is enabled and driven high,
but the external system is holding it low, a
read of the port will indicate that the pin is
low.
D
D
CK
CK
TRIS
Latch
Data
Latch
Reset
Q
Q
Q
Q
EQUIVALENT CIRCUIT
FOR A SINGLE I/O PIN
RD Port
PIC16F5X
Q
DS41213D-page 29
E
V
V
P
N
D
SS
DD
V
V
DD
SS
I/O
pin