PIC16F876AT-I/SS Microchip Technology, PIC16F876AT-I/SS Datasheet - Page 93

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PIC16F876AT-I/SS

Manufacturer Part Number
PIC16F876AT-I/SS
Description
28 PIN, 14KB ENH FLASH, 368 RAM, 22 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F876AT-I/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9.4.4.5
When the CKP bit is cleared, the SCL output is forced
to ‘0’; however, setting the CKP bit will not assert the
SCL output low until the SCL output is already sampled
low. Therefore, the CKP bit will not assert the SCL line
until an external I
asserted the SCL line. The SCL output will remain low
until the CKP bit is set and all other devices on the I
bus have deasserted SCL. This ensures that a write to
the CKP bit will not violate the minimum high time
requirement for SCL (see Figure 9-12).
FIGURE 9-12:
 2003 Microchip Technology Inc.
SDA
SCL
CKP
WR
SSPCON
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Clock Synchronization and the
CKP Bit
2
C master device has already
CLOCK SYNCHRONIZATION TIMING
DX
Master device
asserts clock
2
C
Master device
deasserts clock
PIC16F87XA
DS39582B-page 91
DX-1

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