PIC18F8620-E/PT Microchip Technology, PIC18F8620-E/PT Datasheet - Page 124

• Manufacturer Part Number: PIC18F8620-E/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F8620-E/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.75K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3840 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 68
• Number Of Timers: 2 x 8 bit
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Lead Free Status / Rohs Status: Details

PIC18F6520/8520/6620/8620/6720/8720
10.8
PORTH is an 8-bit wide, bidirectional I/O port. The cor-
responding data direction register is TRISH. Setting a
TRISH bit (= 1) will make the corresponding PORTH
pin an input (i.e., put the corresponding output driver in
a high-impedance mode). Clearing a TRISH bit (= 0)
will make the corresponding PORTH pin an output (i.e.,
put the contents of the output latch on the selected pin).
Read-modify-write operations on the LATH register,
read and write the latched output value for PORTH.
Pins RH7:RH4 are multiplexed with analog inputs
AN15:AN12. Pins RH3:RH0 are multiplexed with the
system bus as the external memory interface; they are
the high-order address bits, A19:A16. By default, pins
RH7:RH4 are enabled as A/D inputs and pins
RH3:RH0 are enabled as the system address bus.
Register ADCON1 configures RH7:RH4 as I/O or A/D
inputs. Register MEMCON configures RH3:RH0 as I/O
or system bus pins.
EXAMPLE 10-8:
DS39609B-page 122
CLRF
CLRF
MOVLW
MOVWF
MOVLW
MOVWF
Note:
Note 1: On
2: On
PORTH, LATH and TRISH
Registers
PORTH
LATH
0Fh
ADCON1
0CFh
TRISH
PORTH is available only on PIC18F8X20
devices.
RH7:RH4 default to A/D inputs and read
as ‘0’.
RH3:RH0 default to system bus signals.
Power-on
Power-on
INITIALIZING PORTH
; Initialize PORTH by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
;
;
; Value used to
; initialize data
; direction
; Set RH3:RH0 as inputs
; RH5:RH4 as outputs
; RH7:RH6 as inputs
Reset,
Reset,
PORTH
PORTH
pins
pins
FIGURE 10-17:
FIGURE 10-18:
Note 1: I/O pins have diode protection to V
RD LATH
WR LATH
or
PORTH
RD TRISH
RD PORTH
RD LATH
Data
Bus
Data
Bus
WR TRISH
WR LATH
or
PORTH
RD TRISH
RD PORTH
WR TRISH
Note 1: I/O pins have diode protection to V
To A/D Converter
TRIS Latch
TRIS Latch
Data Latch
Data Latch
D
D
D
D
CK
CK
CK
CK
RH3:RH0 PINS BLOCK
DIAGRAM IN I/O MODE
Q
RH7:RH4 PINS BLOCK
DIAGRAM IN I/O MODE
Q
Q
 2004 Microchip Technology Inc.
Q
Q
Q
EN
EN
Schmitt
Trigger
Input
Buffer
EN
Schmitt
Trigger
Input
Buffer
EN
D
D
DD
DD
and V
and V
I/O pin
I/O pin
SS
SS
(1)
.
(1)
.