LMH0387SL/NOPB National Semiconductor, LMH0387SL/NOPB Datasheet - Page 9

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LMH0387SL/NOPB

Manufacturer Part Number
LMH0387SL/NOPB
Description
IC EQUALIZER DRIVER 48-TCSP
Manufacturer
National Semiconductor
Datasheet

Specifications of LMH0387SL/NOPB

Applications
Amplifier
Interface
SPI Serial
Voltage - Supply
3.3V
Package / Case
*
Mounting Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Device Description
The LMH0387 3 Gbps HD/SD SDI Configurable I/O Adaptive
Cable Equalizer / Cable Driver is used at the input or output
port of digital video equipment. It is designed to allow the
sharing of a single BNC connector for either input or output.
CONFIGURING THE INPUT (EQUALIZER) OR OUTPUT
(CABLE DRIVER) MODE
The LMH0387 must be configured in either the input mode as
an equalizer, or the output mode as a cable driver.
Input Mode (Equalizer)
To configure the LMH0387 in the input mode, the equalizer
must be enabled and the cable driver must be disabled as
described in the following steps:
1.
2.
3.
Output Mode (Cable Driver)
To configure the LMH0387 in the output mode, the cable driv-
er must be enabled. The equalizer may either be disabled for
power savings or enabled to provide a loopback path for the
data being transmitted. For the normal output mode (equal-
izer disabled for power savings) follow these steps:
1.
2.
To configure the LMH0387 for the output mode with the loop-
back path, the equalizer can be enabled in output mode by
writing either “01” (auto sleep – default) or “00” (never sleep)
to bits [4:3] of SPI register 00h. In this case, the LMH0387
input/output mode may be configured simply by toggling the
TX_EN pin since the equalizer remains active in either mode
(TX_EN set low for input mode and high for output mode).
Input Mode (Equalizer) Description
SPI register access is required while operating the LMH0387
in the input mode. The equalizer launch amplitude fine tuning
must be set to nominal via the SPI for correct equalizer op-
eration. To do this, write 30h (“00110000 binary”) to SPI
register 02h. The SPI registers provide access to many other
useful LMH0387 features while in the input mode. Refer to the
Input Mode (Equalizer) SPI Register Access
tails.
INPUT INTERFACING
The LMH0387 accepts single-ended input at the BNC_IO pin.
The input must be AC coupled. The
cuit
input must be properly terminated with a 1.0 µF capacitor fol-
lowed by a 220Ω resistor to ground as shown.
The LMH0387 BNC_IO input can be optimized for different
launch amplitudes via the SPI (see
OPTIMIZATION (REGISTER 02h)
izer) SPI Register Access
The LMH0387 correctly handles equalizer pathological sig-
nals for standard definition and high definition serial digital
diagram shows the typical configuration. The TERM
Disable the cable driver by pulling the TX_EN pin low.
Enable the equalizer by setting the sleep mode via the
SPI to either auto sleep or disabled (never sleep). To do
this, write either “01” (auto sleep – default) or “00” (never
sleep) to bits [4:3] of SPI register 00h.
Set the equalizer launch amplitude fine tuning to the
nominal setting via the SPI. To do this, write 30h
(“00110000” binary) to SPI register 02h.
Disable the equalizer by forcing it to sleep via the SPI. To
do this, write “10” (force sleep) to bits [4:3] of SPI register
00h.
Enable the cable driver by pulling the TX_EN pin high.
section).
in the
Typical Application Cir-
LAUNCH AMPLITUDE
Input Mode (Equal-
section for de-
RX
9
video, as described in SMPTE RP 178 and RP 198, respec-
tively.
OUTPUT INTERFACING
The LMH0387 equalizer outputs, SDO and SDO, are inter-
nally terminated 100Ω LVDS outputs. These outputs can be
DC coupled to most common differential receivers.
The default output common mode voltage (V
output common mode voltage may be adjusted via the SPI in
200 mV increments, from 1.05V to 1.85V (see
DRIVER ADJUSTMENTS (REGISTER 01h)
Mode (Equalizer) SPI Register Access
justable output common mode voltage offers flexibility for
interfacing to many types of receivers.
The default differential output swing (V
The differential output swing may be adjusted via the SPI in
100 mV increments from 400 mV
PUT DRIVER ADJUSTMENTS (REGISTER 01h)
Mode (Equalizer) SPI Register Access
The LMH0387 equalizer output should be DC coupled to the
input of the receiving device as long as the common mode
ranges of both devices are compatible. 100Ω differential
transmission lines should be used to connect between the
LMH0387 outputs and the input of the receiving device where
possible.
The LMH0387 allows flexibility when interfacing to low voltage
crosspoint switches (i.e. 1.8V) and other devices with limited
input ranges. The LMH0387 equalizer outputs can be DC
coupled to these devices in most cases, avoiding the need to
AC couple.
The LMH0387 may be AC coupled to the receiving device
when necessary. For example, the LMH0387 equalizer out-
puts are not strictly compatible with 3.3V CML and thus should
not be connected via 50Ω resistors to 3.3V. If the input com-
mon mode range of the receiving device is not compatible with
the output common mode range of the LMH0387, then AC
coupling is required. Following the AC coupling capacitors,
the signal may have to be biased at the input of the receiving
device.
CARRIER DETECT (CD)
Carrier detect CD indicates if a valid signal is present at the
LMH0387 BNC_IO pin. If CD
threshold will be altered accordingly. CD provides a high volt-
age when no signal is present at the LMH0387 BNC_IO pin.
CD is low when a valid input signal is detected.
CARRIER DETECT THRESHOLD (CD
The CD
The carrier detect threshold is set by applying a voltage in-
versely proportional to the length of cable to equalize before
loss of carrier is triggered. The applied voltage must be
greater than the CD
order to change the CD threshold. As the applied CD
voltage is increased, the amount of cable that will be equal-
ized before carrier detect is de-asserted is decreased.
CD
for normal CD operation.
Figure 4
to force carrier detect to inactive vs. Belden 1694A cable
length. The results shown are valid for Belden 1694A cable
lengths of 0-120m at 2.97 Gbps, 0-200m at 1.485 Gbps, and
0-400m at 270 Mbps.
THRESH
THRESH
shows the minimum CD
may be left unconnected or connected to ground
pin sets the threshold for the carrier detect.
THRESH
floating voltage (typically 1.3V) in
THRESH
THRESH
P-P
is used, the carrier detect
to 800 mV
input voltage required
section).
THRESH
SSP-P
section). This ad-
OS
) is 700 mV
) is 1.25V. The
)
P-P
in the
www.national.com
in the
(see
OUTPUT
THRESH
OUT-
Input
Input
P-P
.

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