AD5320BRM Analog Devices Inc, AD5320BRM Datasheet - Page 4

• Manufacturer Part Number: AD5320BRM
• Description: D/A Converter (D-A) IC
• Manufacturer: Analog Devices Inc

Specifications of AD5320BRM

• Resolution (bits): 12bit
• Digital Ic Case Style: MSOP
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +105°C
• Update Rate: 0.125MSPS
• Mounting Type: Surface Mount
• Peak Reflow Compatible (260 C): No
• Rohs Status: RoHS non-compliant
• Settling Time: 8µs
• Number Of Bits: 12
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power Dissipation (max): -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD5320
TIMING CHARACTERISTICS
V
Table 2.
Parameter
t
t
t
t
t
t
t
t
1
2
3
1
2
3
4
5
6
7
8
All input signals are specified with tr = tf = 5 ns (10% to 90% of V
See Figure 2.
Maximum SCLK frequency is 30 MHz at V
DD
3
= 2.7 V to 5.5 V, all specifications T
1, 2
V
50
13
22.5
0
5
4.5
0
50
SYNC
SCLK
DD
DIN
= 2.7 V to 3.6 V
t
8
DD
= 3.6 V to 5.5 V and 20 MHz at V
Limit at T
t
DB15
4
MIN
to T
t
5
MIN
V
33
13
13
0
5
4.5
0
33
MAX
DD
, T
, unless otherwise noted.
= 3.6 V to 5.5 V
MAX
t
6
DD
t
3
) and timed from a voltage level of (V
Figure 2. Serial Write Operation
Rev. C | Page 4 of 20
t
1
DD
t
2
= 2.7 V to 3.6 V.
DB0
t
7
ns min
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
IL
+ V
Description
SCLK cycle time
SCLK high time
SCLK low time
SYNC to SCLK rising edge setup time
Data setup time
Data hold time
SCLK falling edge to SYNC rising edge
Minimum SYNC high time
IH
)/2.