AD7879-1ACPZ-500R7 Analog Devices Inc, AD7879-1ACPZ-500R7 Datasheet - Page 36

• Manufacturer Part Number: AD7879-1ACPZ-500R7
• Description: Touch Screen Controller
• Manufacturer: Analog Devices Inc
• Type: Resistiver

Specifications of AD7879-1ACPZ-500R7

• Touch Panel Interface: 4-Wire
• Number Of Inputs/keys: 1 TSC
• Resolution (bits): 12 b
• Data Interface: I²C, Serial
• Data Rate/sampling Rate (sps, Bps): 105k
• Voltage Reference: External
• Voltage - Supply: 1.6 V ~ 3.6 V
• Current - Supply: 10nA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-LFCSP-VQ
• Voltage Supply Source: Single Supply
• Sampling Rate (per Second): 105k
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AD7879-1ACPZ-500R7TR

AD7879/AD7889
READ (USING REPEATED START)
READ (WRITE TRANSACTION SETS UP REGISTER ADDRESS)
WRITE
S
S
S
TRANSACTIONS
7-BIT DEVICE
7-BIT DEVICE
7-BIT DEVICE
NOTES
1. A START CONDITION AT THE BEGINNING IS DEFINED AS A HIGH-TO-LOW TRANSITION ON SDA WHILE SCL REMAINS HIGH.
2. A STOP CONDITION AT THE END IS DEFINED AS A LOW-TO-HIGH TRANSITION ON SDA WHILE SCL REMAINS HIGH.
3. THE MASTER GENERATES THE ACK AT THE END OF THE READBACK TO SIGNAL THAT IT DOES NOT WANT ADDITIONAL DATA.
4. 7-BIT DEVICE ADDRESS [DEV A6:DEV A0] = [01011XX], WHERE THE TWO LSB Xs ARE DON'T CARE BITS.
5. REGISTER DATA [D15:D8] AND REGISTER DATA [D7:D0] ARE ALWAYS SEPARATED BY A LOW ACK BIT.
6. THE R/W BIT IS SET TO 1 TO INDICATE A READBACK OPERATION.
ADDRESS
ADDRESS
ADDRESS
OUTPUT FROM MASTER
OUTPUT FROM
AD7879-1/AD7889-1
REPEATED
SEPARATE
READ AND
USING
START
WRITE
W
W
W
SDA
SCL
REGISTER ADDR
REGISTER ADDR
REGISTER ADDR
START
SR
19
[7:0]
[7:0]
[7:0]
P
DEV
t
A6
S = START BIT
P = STOP BIT
SR = REPEATED START BIT
R = READ BIT
1
20
DEV
A6
19
S
DEV
1
A5
21
DEV
AD7879-1/AD7889-1
Figure 44. Example of I
DEV
DEVICE ADDRESS
A6
A5
20
Figure 45. Example of Sequential I
AD7879-1/AD7889-1
2
P
DEVICE ADDRESS
HIGH BYTE [15:8]
AD7879-1/AD7889-1
DEV
WRITE DATA
DEV
DEVICE ADDRESS
A5
7-BIT DEVICE
A4
21
ADDRESS
3
S
DEV
A3
7-BIT DEVICE
t
2
DEV
ADDRESS
4
A1
25
DEV
A2
DEV
5
A0
t
4
26
R
DEV
DEV
A1
A1
W = WRITE BIT
ACK = ACKNOWLEDGE BIT
ACK = NO ACKNOWLEDGE BIT
25
6
R/W
2
LOW BYTE [7:0]
t
C Timing for Single Register Readback Operation
3
HIGH BYTE [15:8]
27
WRITE DATA
R
DEV
DEV
A0
A0
t
Rev. C | Page 36 of 40
4
READ DATA
26
ACK
7
28
HIGH BYTE [15:8]
R/W
R/W
READ DATA
27
8
D7
29
ACK
ACK
REGISTER DATA[D7:D0]
2
28
9
C Write and Readback Operation
D6
30
t
. . .
5
D7
A7
REGISTER ADDRESS[A7:A0]
29
10
REGISTER DATA[D7:D0]
LOW BYTE [7:0]
HIGH BYTE [15:8]
D6
A6
READ DATA
30
t
WRITE DATA
11
5
LOW BYTE [7:0]
READ DATA
D1
35
D0
36
. . .
D1
A1
16
35
ACK
. . .
LOW BYTE [7:0]
37
HIGH BYTE [15:8]
D0
A0
WRITE DATA
READ DATA
17
36
HIGH BYTE [15:8]
ACK
ACK
t
6
READ DATA
P
18
37
t
8
P
P
t
7
LOW BYTE [7:0]
READ DATA
LOW BYTE [7:0]
AD7879-1/AD7889-1
DEVICE ADDRESS
READ DATA
DEV
A6
1
DEV
A5
2
DEV
A4
3
P
P