AD8306AR Analog Devices Inc, AD8306AR Datasheet - Page 13

• Manufacturer Part Number: AD8306AR
• Description: Logarithmic Amplifier IC
• Manufacturer: Analog Devices Inc
• Type: Limiting-Logarithmic Amplifierr

Specifications of AD8306AR

• No. Of Amplifiers: 1
• No. Of Pins: 16
• Peak Reflow Compatible (260 C): No
• Bandwidth: 400MHz
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC
• Rohs Status: RoHS non-compliant
• Applications: Receiver Signal Strength Indication (RSSI)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

10 mV/dB The AD8031 rail-to-rail op amp, used in both ex-
amples, can swing from 50 mV to 4.95 mV on a single +5 V
supply. If high output current is required (> 10 mA), the AD8051,
which also has rail-to-rail capability but can deliver up to 45 mA
of output current, can be used.
APPLICATIONS
The AD8306 is a versatile and easily applied log-limiting ampli-
fier. Being complete, it can be used with very few external com-
ponents, and most applications can be accommodated using the
simple connections shown in the preceding section. A few ex-
amples of more specialized applications are provided here.
High Output Limiter Loading
The AD8306 can generate a fairly large output power at its
differential limiter output interface. This may be coupled into a
50
following similar lines to those provided for input matching.
Alternatively, a flux-linked transformer, having a center-tapped
primary, may be used. Even higher output powers can be ob-
tained using emitter-followers. In Figure 31, the supply voltage
to the AD8306 is dropped from 5 V to about 4.2 V, by the
diode. This increases the available swing at each output to about
2 V. Taking both outputs differentially, a square wave output of
4 V p-p can be generated.
When operating at high output power levels and high frequen-
cies, very careful attention must be paid to the issue of stability.
Oscillation is likely to be observed when the input signal level is
low, due to the extremely high gain-bandwidth product of the
AD8306 under such conditions. These oscillations will be less
evident when signal-balancing networks are used, operating at
frequencies below 200 MHz, and they will generally be fully
quenched by the signal at input levels of a few dB above the
noise floor.
Modulated Limiter Output
The limiter output stage of the AD8306 also provides an analog
multiplication capability: the amplitude of the output square
wave can be controlled by the current withdrawn from LMDR
(Pin 9). An analog control input of 0 V to +1 V is used to gener-
ate an exactly-proportional current of 0 mA to 10 mA in the npn
transistor, whose collector is held at a fixed voltage of 400 mV
by the internal bias in the AD8306. When the input signal is
above the limiting threshold, the output will then be a square-
wave whose amplitude is proportional to the control bias.
REV. A
0.1 F
10
grounded load using the narrow-band coupling network
Figure 31. Increasing Limiter Output Voltage
1
2
3
4
5
6
7
8
COM2
VPS1
PADL
INHI
INLO
PADL
COM1
ENBL
APPROX. 4.2V
AD8306
VLOG
LMLO
LMDR
PADL
PADL
VPS2
FLTR
LMHI
16
15
14
13
12
11
10
9
10
R
LIM
0.1 F
IN914
R
RSSI
LOAD
R
SET R
LOAD
+5V
3V TO 5V
5V TO 3V
DIFFERENTIAL
OUTPUT = 4V pk-pk
L
= 5*R
LIM
–13–
Effect of Waveform Type on Intercept
The AD8306 fundamentally responds to voltage and not to
power. A direct consequence of this characteristic is that input
signals of equal rms power, but differing crest factors, will pro-
duce different results at the log amp’s output.
The effect of differing signal waveforms is to shift the effective
value of the log amp’s intercept. Graphically, this looks like a
vertical shift in the log amp’s transfer function. The device’s
logarithmic slope however is not affected. For example, consider
the case of the AD8306 being alternately fed by an unmodu-
lated sine wave and by a single CDMA channel of the same rms
power. The AD8306’s output voltage will differ by the equiva-
lent of 3.55 dB (71 mV) over the complete dynamic range of the
device (the output for a CDMA input being lower).
Table II shows the correction factors that should be applied to
measure the rms signal strength of a various signal types. A sine
wave input is used as a reference. To measure the rms power of
a square wave, for example, the mV equivalent of the dB value
given in the table (20 mV/dB times 3.01 dB) should be sub-
tracted from the output voltage of the AD8306.
Table II. Shift in AD8306 Output for Signals with Differing
Crest Factors
Signal Type
Sine Wave
Square Wave or DC
Triangular Wave
GSM Channel (All Time Slots On)
CDMA Channel (Forward Link, 9
CDMA Channel (Reverse Link)
PDC Channel (All Time Slots On) +0.58 dB
Gaussian Noise
Evaluation Board
An evaluation board, carefully laid out and tested to demon-
strate the specified high speed performance of the AD8306 is
available. Figure 33 shows the schematic of the evaluation
board, which fairly closely follows the basic connections sche-
matic shown in Figure 27. For ordering information, please
refer to the Ordering Guide. Links, switches and component
settings for different setups are described in Table III.
0.1 F
Channels On)
10
Figure 32. Variable Limiter Output Programming
1
2
3
4
5
6
7
8
COM2
VPS1
PADL
INHI
INLO
PADL
COM1
ENBL
AD8306
LMDR
VLOG
LMLO
PADL
PADL
VPS2
FLTR
LMHI
16
15
14
13
12
10
11
9
10
0mA TO
10mA
0.1 F
VARIABLE
OUTPUT
2N3904
Correction Factor
(Add to Output Reading)
0 dB
–3.01 dB
+0.9 dB
+0.55 dB
+3.55 dB
+0.5 dB
+2.51 dB
RSSI
18
AD8306
AD8031
0.1 F
0V TO +1V
8.2k
1.8k
V
S