AD8306AR Analog Devices Inc, AD8306AR Datasheet - Page 14

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AD8306AR

Manufacturer Part Number
AD8306AR
Description
Logarithmic Amplifier IC
Manufacturer
Analog Devices Inc
Type
Limiting-Logarithmic Amplifierr
Datasheet

Specifications of AD8306AR

No. Of Amplifiers
1
No. Of Pins
16
Peak Reflow Compatible (260 C)
No
Bandwidth
400MHz
Leaded Process Compatible
No
Mounting Type
Surface Mount
Package / Case
16-SOIC
Rohs Status
RoHS non-compliant
Applications
Receiver Signal Strength Indication (RSSI)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Manufacturer
Quantity
Price
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AD8306AR
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AD8306
Component
SW1
R1
R/L, C1, C2
R3/R4
L1, C5, C6
R8, LK1
C7
ENABLE
INLO
+V
INHI
EXT
SIG
SIG
S
Function
Device Enable. When in Position A, the ENBL pin is connected to +V
AD8306 is in normal operating mode. In Position B, the ENBL pin is connected
to an SMA connector labeled Ext Enable. A signal can be applied to this connector
to enable/disable the AD8306.
This pad is used to ac-couple INLO to ground for single-ended input drive. To drive
the AD8306 differentially, R1 should be removed.
Input Interface. The 52.3
a high-pass input filter whose corner frequency (640 kHz) is equal to 1/(2 RC),
where C = (C1)/2 and R is the parallel combination of 52.3
input impedance of 1000 . Alternatively, the 52.3
an inductor to form an input matching network. See Input Matching Network
section for more details.
Slope Adjust. A simple slope adjustment can be implemented by adding a resistive
divider at the VLOG output. R3 and R4, whose sum should be about 1 k , and
never less than 40
Slope = 20 mV/dB
Limiter Output Coupling. C5 and C6 ac-couple the limiter’s differential outputs.
By adjusting these values and installing an inductor in L1, an output matching
network can be implemented. To convert the limiter’s differential output to single-
ended, R11 and R12 (nominally 0 ) can be replaced with a surface mount balun
such as the ETC1-1-13 (Macom). The balun can be grounded by soldering a 0
into Position R9 (nominally open).
Limiter Output Current. With LK1 installed, R8 enables and sets the limiter
output current. The limiter’s output current is set according to the equation
(I
To disable the limiter (recommended if the limiter is not being used), LK1 should
be removed.
RSSI Bandwidth Adjust. The addition of C7 (farads) will lower the RSSI bandwidth of
the VLOG output according to the equation: f
OUT
= 400 mV/R8). The limiter current can be as high as 10 mA (R8 = 40 ).
0
R1
0.01 F
0.01 F
10
C2
R2
C1
0.1 F
R4/(R3 + R4).
C3
R10
52.3
(see specs), set the slope according to the equation:
A
B
SW1
Table III. Evaluation Board Setup Options
Figure 33. Evaluation Board Schematic
resistor in position R10, along with C1 and C2, create
1
2
3
4
5
6
7
8
COM2
VPS1
PADL
INHI
INLO
PADL
COM1
ENBL
AD8306
LMDR
CORNER
VLOG
LMLO
PADL
PADL
VPS2
FLTR
LMHI
–14–
16
15
14
13
12
10
11
9
(Hz) = 12.7 10
resistor can be replaced by
C7 (OPEN)
50
R6
LK1
and the AD8306’s
0.1 F
402
C4
R8
–6
/(C7 + 3.5 10
S
and the
R7
50
(OPEN)
10
0
R3
R5
L1
0.01 F
0.01 F
–12
R4
(OPEN)
C5
C6
).
Default Condition
SW1 = A
R1 = 0
R10 = 52.3
C1 = C2 = 0.01 F
R3 = 0
R4 =
L1 = Open
C5 = 0.01 F
C6 = 0.01 F
R9 = Open
R10 = R11 = 0
LK1 Installed. R8 = 402
R6, R7 (Limited Load
Resistors) = 50
C7 = Open
(OPEN)
R11
R12
0
0
R9
+V
V
RSSI
S
REV. A

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