AD9222ABCPZRL7-50 Analog Devices Inc, AD9222ABCPZRL7-50 Datasheet - Page 36

• Manufacturer Part Number: AD9222ABCPZRL7-50
• Description: Octal 12 Bit, 50 MSPS Serial LVDS ADC
• Manufacturer: Analog Devices Inc

Specifications of AD9222ABCPZRL7-50

• Number Of Bits: 12
• Sampling Rate (per Second): 50M
• Data Interface: Serial, SPI™
• Number Of Converters: 8
• Power Dissipation (max): 760mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9222
MEMORY MAP
READING THE MEMORY MAP TABLE
Each row in the memory map register table (Table 16) has eight
address locations. The memory map is divided into three sections:
the chip configuration register map (Address 0x00 to Address 0x02),
the device index and transfer register map (Address 0x05 and
Address 0xFF), and the ADC functions register map (Address 0x08
to Address 0x22).
The leftmost column of the memory map indicates the register
address number, and the default value is shown in the second right-
most column. The (MSB) Bit 7 column is the start of the default
hexadecimal value given. For example, Address 0x09, the clock
register, has a default value of 0x01, meaning Bit 7 = 0, Bit 6 = 0,
Bit 5 = 0, Bit 4 = 0, Bit 3 = 0, Bit 2 = 0, Bit 1 = 0, and Bit 0 = 1, or
0000 0001 in binary. This setting is the default for the duty cycle
stabilizer in the on condition. By writing a 0 to Bit 6 of this address,
the duty cycle stabilizer turns off. For more information on this
and other functions, consult the AN-877 Application Note,
Interfacing to High Speed ADCs via SPI.
Rev. D | Page 36 of 60
RESERVED LOCATIONS
Undefined memory locations should not be written to except
when writing the default values suggested in this data sheet.
Addresses that have values marked as 0 should be considered
reserved and have a 0 written into their registers during power-up.
DEFAULT VALUES
When the AD9222 comes out of a reset, critical registers are
preloaded with default values. These values are indicated in
Table 16, where an X refers to an undefined feature.
LOGIC LEVELS
An explanation of various registers follows: “Bit is set” is
synonymous with “bit is set to Logic 1” or “writing Logic 1 for
the bit. ” Similarly, “clear a bit” is synonymous with “bit is set to
Logic 0” or “writing Logic 0 for the bit. ”