AD9786-EBZ Analog Devices Inc, AD9786-EBZ Datasheet - Page 21

• Manufacturer Part Number: AD9786-EBZ
• Description: 16 BIT DAC W/2/4/8x INTERPOLATION FILTER
• Manufacturer: Analog Devices Inc
• Series: TxDAC+®r

Specifications of AD9786-EBZ

• Number Of Dac's: 1
• Number Of Bits: 16
• Outputs And Type: 1, Differential
• Sampling Rate (per Second): 500M
• Data Interface: Parallel
• Dac Type: Current
• Voltage Supply Source: Single
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD9786
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MSB/LSB TRANSFERS
The AD9786 serial port can support both MSB-first or LSB-first
data formats. This functionality is controlled by register address
DATADIR (0x00[6]). The default is MSB first. When this bit is
set active high, the AD9786 serial port is in LSB-first format.
That is, if the AD9786 is in LSB-first mode, the instruction byte
must be written from least significant bit to most significant bit.
Multibyte data transfers in MSB-first format can be completed
by writing an instruction byte that includes the register address
of the most significant byte. In MSB-first mode, the serial port
internal byte address generator decrements for each byte
required of the multibyte communication cycle. Multibyte data
transfers in LSB-first format can be completed by writing an
instruction byte that includes the register address of the least
significant byte. In LSB-first mode, the serial port internal byte
address generator increments for each byte required of the
multibyte communication cycle.
The AD9786 serial port controller address increments from 0x1F
to 0x00 for multibyte I/O operations if the MSB-first mode is
active. The serial port controller address decrements from 0x00 to
0x1F for multibyte I/O operations if the LSB-first mode is active.
NOTES ON SERIAL PORT OPERATION
The AD9786 serial port configuration bits reside in Bit 6 and
Bit 7 of Register Address 0x00. Note that the configuration
changes immediately upon writing to the last bit of the register.
For multibyte transfers, writing to this register might occur
during the middle of a communication cycle. Care must be
taken to compensate for this new configuration for the
remaining bytes of the current communication cycle.
The same considerations apply to setting the software reset
SWRST (0x00[5]) bit. All other registers are set to their default
values, but the software reset does not affect the bits in Register
Address 0x00 and Register Address 0x04.
It is recommended to use only single-byte transfers when
changing serial port configurations or initiating a software
reset.
Rev. B | Page 21 of 56
SCLK
SCLK
SCLK
SCLK
SDIO
SDIO
SDIO
SDIO
SDO
SDO
CSB
CSB
CSB
CSB
SDO
R/W N1 N0
A0
Figure 37. Serial Register Interface Timing MSB First
Figure 38. Serial Register Interface Timing LSB First
INSTRUCTION BIT 7
INSTRUCTION CYCLE
INSTRUCTION CYCLE
A1 A2
Figure 39. Timing Diagram for Register Write
Figure 40. Timing Diagram for Register Read
t
t
DS
DS
DATA BIT n
A4 A3
A3 A4
t
PWH
t
t
DH
DV
t
A2 A1
N0 N1 R/W D0
SCLK
t
PWL
INSTRUCTION BIT 6
A0 D7 D6
DATA BIT n –1
D0
D7 D6
0
0
DATA TRANSFER CYCLE
DATA TRANSFER CYCLE
D1
D1
N
N
0
0
D5
D5
D2
D2
N
N
0
0
D3
D4
D3
D4
N
0
0
N
D5
D2
D2
D5
N
N
0
0
AD9786
D1
D6
D6
D1
0
N
N
0
D0
D0
D7
D7
N
N
0
0